参数资料
型号: S1D13706F00A
元件分类: 显示控制器
英文描述: 320 X 240 PIXELS CRT OR FLAT PNL GRPH DSPL CTLR, PQFP100
封装: TQFP-100
文件页数: 68/171页
文件大小: 4940K
代理商: S1D13706F00A
APPENDIX
Appendix 3. Control registers
7751 Group User’s Manual
20–9
Appendix 3. Control registers
The register structure of each control register assignment in the SFR area are shown on the following pages.
The view of the register structure is described below.
0
1
0
XXX register (Address XX16)
b1
b0
b2
b3
b4
b5
b6
b7
0
V1
V2
V3
2
3
... select bit
0 : ...
1 : ...
... select bit
0 : ...
1 : ...
The value is “0” at reading.
0 : ...
1 : ...
Fix this bit to “0.”
4
7 to 5 Nothing is assigned.
!
RW
WO
RO
RW
0
Bit
Bit name
This bit is ignored in ... mode.
Functions
At reset
RW
... flag
Undefined
V1
Blank
: Set to “0” or “1” to according to the usage.
0
: Set to “0” at writing.
1
: Set to “1” at writing.
!
: Ignored depending on the specific mode or state. It may be either “0” or “1.”
: Nothing is assigned.
V2
0
: “0” immediately after a reset.
1
: “1” immediately after a reset.
Undefined
: Undefined immediately after a reset.
V3
RW
: It is possible to read the bit state at reading. The written value becomes valid.
RO
: It is possible to read the bit state at reading. The written value becomes invalid. Accordingly, the written
value may be “0” or “1.”
WO
: The written value becomes valid. It is impossible to read the bit state. The value is undefined at reading.
However, when [“0” is at reading”] is indicated in the “Function” or “Note” column, the bit is always “0” at
reading. (See V4 above.)
: It is impossible to read the bit state. The value is undefined at reading.
However, when [“0” is at reading”] is indicated in the “Function” or “Note” column, the bit is always “0” at
reading. (See V4 above.)
The written value becomes invalid. Accordingly, the written value may be “0” or “1.”
V4
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