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参数资料
型号： S29GL256N10FFI020
厂商： SPANSION LLC
元件分类： PROM
英文描述： MirrorBit Flash Family
中文描述： 16M X 16 FLASH 3V PROM, 100 ns, PBGA64
封装： 13 X 11 MM, LEAD FREE, FBGA-64
文件页数： 9/95页
文件大小： 3781K
代理商： S29GL256N10FFI020
May 30, 2008 S29GL-N_00_B8
S29GL-N
17
Data
She e t
7.5
Standby Mode
When the system is not reading or writing to the device, it can place the device in the standby mode. In this
mode, current consumption is greatly reduced, and the outputs are placed in the high impedance state,
independent of the OE# input.
The device enters the CMOS standby mode when the CE# and RESET# pins are both held at VIO ± 0.3 V.
(Note that this is a more restricted voltage range than VIH.) If CE# and RESET# are held at VIH, but not within
VIO ± 0.3 V, the device is in the standby mode, but the standby current is greater. The device requires
standard access time (tCE) for read access when the device is in either of these standby modes, before it is
ready to read data.
If the device is deselected during erasure or programming, the device draws active current until the operation
is completed.
Refer to DC Characteristics on page 70 for the standby current specification.
7.6
Automatic Sleep Mode
The automatic sleep mode minimizes Flash device energy consumption. The device automatically enables
this mode when addresses remain stable for tACC + 30 ns. The automatic sleep mode is independent of the
CE#, WE#, and OE# control signals. Standard address access timings provide new data when addresses are
changed. While in sleep mode, output data is latched and always available to the system. Refer to DC
Characteristics on page 70 for the automatic sleep mode current specification.
7.7
RESET#: Hardware Reset Pin
The RESET# pin provides a hardware method of resetting the device to reading array data. When the
RESET# pin is driven low for at least a period of tRP, the device immediately terminates any operation in
progress, tristates all output pins, and ignores all read/write commands for the duration of the RESET# pulse.
The device also resets the internal state machine to reading array data. The operation that was interrupted
should be reinitiated once the device is ready to accept another command sequence, to ensure data integrity.
Current is reduced for the duration of the RESET# pulse. When RESET# is held at VSS±0.3 V, the device
draws CMOS standby current (ICC5). If RESET# is held at VIL but not within VSS±0.3 V, the standby current is
greater.
The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the Flash
memory, enabling the system to read the boot-up firmware from the Flash memory.
Refer to the AC Characteristics tables for RESET# parameters and to Figure 15.3 on page 74 for the timing
diagram.
相关PDF资料
PDF描述
S29AL016M90FFI020 16 MEGABIT (2M X 8 BIT / I M X 16 BIT) 3.0 VOLT ONLY BOOT SECTOR FLASH MEMORY
S29AL016M10FFI020 16 MEGABIT (2M X 8 BIT / I M X 16 BIT) 3.0 VOLT ONLY BOOT SECTOR FLASH MEMORY
S29AL016M90FFI022 16 MEGABIT (2M X 8 BIT / I M X 16 BIT) 3.0 VOLT ONLY BOOT SECTOR FLASH MEMORY
S29AL016M10FFI022 16 MEGABIT (2M X 8 BIT / I M X 16 BIT) 3.0 VOLT ONLY BOOT SECTOR FLASH MEMORY
S29GL256N80FFI023 MirrorBit Flash Family
相关代理商/技术参数
参数描述
S29GL256N10TFI010 功能描述:IC FLASH 制造商:cypress semiconductor corp 系列:GL-N 包装:托盘 零件状态:在售 存储器类型:非易失 存储器格式:闪存 技术:FLASH - NOR 存储容量:256Mb （32M x 8，16M x 16） 写周期时间 - 字，页:100ns 访问时间:100ns 存储器接口:并联 电压 - 电源:2.7 V ~ 3.6 V 工作温度:-40°C ~ 85°C（TA） 安装类型:表面贴装 封装/外壳:56-TFSOP（0.724"，18.40mm 宽） 供应商器件封装:56-TSOP 标准包装:91
S29GL256N11FAI010 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 256M-Bit 32M x 8/16M x 16 110ns 64-Pin Fortified BGA Tray
S29GL256N11FAIIH2 制造商:Spansion 功能描述:S29GL256N11FAIIH2 - Trays
S29GL256N11FFA022 制造商:Spansion 功能描述:
S29GL256N11FFI010 制造商:Spansion 功能描述:Flash - NOR IC
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