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参数资料
| 型号： | S3P7238XX-QW |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP80 |
| 封装： | 14 X 20 MM, QFP-80 |
| 文件页数： | 7/36页 |
| 文件大小： | 295K |
| 代理商： | S3P7238XX-QW |
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S3C7238/P7238/C7235/P7235
ELECTRICAL DATA
14-7
Table 14-6. A.C. Electrical Characteristics
(TA = – 40 °C to + 85 °C, VDD = 1.8 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Instruction cycle
tCY
VDD = 2.7 V to 5.5 V
0.67
–
64
s
time (1)
VDD = 1.8 V to 4.5 V
0.95
–
64
With subsystem clock (fxt)
114
122
125
TCL0 input
fTI0
VDD = 2.7 V to 5.5 V
0
–
1.5
MHz
frequency
VDD = 1.8 V to 5.5V
1
MHz
TCL0 input high,
tTIH0, tTIL0 VDD = 2.7 V to 5.5 V
0.48
–
s
low width
VDD = 1.8 V to 5.5 V
1.8
SCK cycle time
tKCY
VDD = 2.7 V to 5.5 V
External SCK source
800
–
ns
Internal SCK source
650
VDD = 1.8 V to 5.5 V
External SCK source
3200
Internal SCK source
3800
SCK high, low
width
tKH, tKL
VDD = 1.8 V to 5.5 V
External SCK source
400
–
ns
Internal SCK source
tKCY/2 – 50
VDD = 1.8 V to 5.5 V
External SCK source
1600
Internal SCK source
tKCY/2 – 150
SI setup time to
tSIK
External SCK source
100
–
ns
SCK high
Internal SCK source
150
SI hold time to
tKSI
External SCK source
400
–
ns
SCK high
Internal SCK source
400
Output delay for
SCK to SO
tKSO
V
DD = 2.7 V to 5.5 V
External SCK source
–
300
ns
Internal SCK source
250
V
DD = 1.8 V to 5.5 V
External SCK source
1000
Internal SCK source
1000
Interrupt input
tINTH,
tINTL
INT0
(2)
–
s
high, low width
INT1, INT2, INT4, KS0–KS7
10
RESET Input Low
Width
tRSL
Input
10
–
s
NOTES:
1.
Unless otherwise specified, Instruction Cycle Time condition values assume a main system clock (fx) source.
2.
Minimum value for INT0 is based on a clock of 2tCY or 128/fx as assigned by the IMOD0 register setting.
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