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参数资料
| 型号： | S5L9284D01-Q0R0 |
| 厂商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | IC, 10/100BASE-TX DUAL-PORT DIGI-PHY TRANSCEIVER, QFP14 |
| 中文描述： | 数字信号处理器 |
| 文件页数： | 5/24页 |
| 文件大小： | 350K |
| 代理商： | S5L9284D01-Q0R0 |
DIGITAL SIGNAL PROCESSOR
S5L9284D
5
32
SBCK
I
Subcode data bit clock
33
SBDT
O
Subcode serial data output
34
DV
DD1
Digital supply voltage 1
35
MUTE
I
Mute control input (
“
H
”
: Mute ON)
36
MLT
I
Latch signal input from micom
37
MDAT
I
Serial data input from micom
38
MCK
I
Serial data transferring clock input from micom
39
DB7
I/O
Data port 7 for external SRAM (MSB)
40
DB6
I/O
Data port 6 for external SRAM
41
DB5
I/O
Data port 5 for external SRAM
42
DB4
I/O
Data port 4 for external SRAM
43
DB3
I/O
Data port 3 for external SRAM
44
DB2
I/O
Data port 2 for external SRAM
45
DB1
I/O
Data port 1 for external SRAM
46
DB0
I/O
Data port 0 for external SRAM (LSB)
47
FLAG1
I/O
Monitoring output for C1 error correction (RA0)
48
FLAG2
I/O
Monitoring output for C1 error correction (RA1)
49
FLAG3
I/O
Monitoring output for C2 error correction (RA2)
50
FLAG4
I/O
Monitoring output for C2 error correction (RA3)
51
FLAG5
I/O
C2 decoder flag (
“
H
”
: when the processing C2 code is in impossible correction
status /RA4)
52
/PBCK
I/O
VCOI/2 clock (4.3218/8.6436 MHz), when locked in with EFMI (RA5)
53
DV
SS2
Digital ground 2
54
FSDW
I/O
Unprotected frame sync (RA6)
55
ULKFS
I/O
Frame sync protection status (RA7)
56
/JIT
I/O
RAM overflow and underflow status (RA8)
57
C4M
I/O
4.2336 MHz clock output (RA9)
58
C16M
I/O
16.9344 MHz clock output (RA10)
59
/WE
I/O
Write enable output to external SRAM
60
/ CS
I/O
Chip select output to external SRAM
61
SEL1
I
X-tal selection terminal (
“
L
”
:16.9344 MHz,
“
H
”
: 33.8688 MHz)
62
SEL2
I
DPLL selection terminal (
“
L
”
: DPLL,
“
H
”
: APLL)
PIN DESCRIPTION
(Continued)
Pin No.
Symbol
I/O
Description
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| S5L9286F02 | 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:DIGITAL SIGNAL PROCESSOR |
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