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参数资料
型号： S71WS512N80BAEZZ2
厂商： Spansion Inc.
英文描述： Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt
中文描述： 堆叠式多芯片产品（MCP）的闪存和移动存储芯片的CMOS 1.8伏特
文件页数： 10/142页
文件大小： 1996K
代理商： S71WS512N80BAEZZ2
10
S71WS512NE0BFWZZ_00_A1 June 28, 2004
A d v a n c e I n f o r m a t i o n
Device Bus Operation
Legend:
L = Logic 0, H = Logic 1, X = Don’t Care.
Note:
Default active edge of CLK is the rising edge. Ordering Information
Table 1. Device Bus Operations
Operation
(Asynchronous) - Flash
CE#f1
L
H
L
H
L
H
H
X
H
H
L
CE#f2
H
L
H
L
H
L
H
X
H
L
H
CE#1pS_1
CE2pS_1
CE#1pS_2
CE2pS_2
H
L
H
H
H
L
H
H
H
L
H
H
H
H
X
X
L
H
H
H
H
H
OE#
WE#
Addr
DQ15-
DQ0
UB#
LB#
RESET#
WP#
ACC#
CLK(See
Note)
AVD#
Read - Address Latched
H
H
H
H
H
H
H
X
H
H
H
L
H
L
H
L
H
H
X
H
H
H
L
H
Valid
Valid
X
X
H
H
H
X
Read - Address Steady
State
L
H
Valid
Valid
X
X
H
H
H
X
L
Write
H
L
Valid
Valid
X
X
H
H
H
X
L
Standby
Reset
X
X
X
X
X
X
High-Z
High-Z
X
X
X
X
H
L
H
H
H
H
X
X
X
X
Output Disable
H
H
X
X
X
X
H
H
H
X
X
Operation(Synchronous) -
Flash
CE#f1
L
H
L
H
CE#f2
H
L
H
L
CE#1pS_1
CE2pS_1
CE#1pS_2
CE2pS_2
H
L
H
H
H
L
H
H
OE#
WE#
Addr
DQ15-
DQ0
UB#
LB#
RESET#
WP#
ACC#
CLK(See
Note)
AVD#
Load Starting Burst
Adress
H
H
H
H
L
H
L
H
X
H
Valid
Data
X
X
H
H
H
Advance Burst Read to
Next Address
L
H
X
Data
X
X
H
H
H
H
Terminate current Burst
read cycle
"Terminate current Burst
read cycle via RESET#"
"Terminate current Burst
read cycle and start new
Burst read cycle"
H
H
H
H
H
H
X
H
X
High-Z
X
X
H
H
H
X
X
X
X
X
X
X
X
H
X
High-Z
X
X
L
H
H
X
X
L
H
H
L
H
L
X
H
Valid
Valid
X
X
H
H
H
H
L
H
H
H
H
Operation
(Asyncronous) - pSRAM
CE#f1
H
H
H
H
H
H
CE#f2
H
H
H
H
H
H
CE#1pS_1
CE2pS_1
CE#1pS_2
CE2pS_2
L
H
H
H
L
H
H
H
L
H
H
H
OE#
WE#
Addr
DQ15-
DQ0
UB#
LB#
RESET#
WP#
ACC#
CLK(See
Note)
AVD#
Read
H
L
H
L
H
L
H
H
H
H
H
H
L
H
Valid
Valid
L
L
H
H
H
X
H/L
Read (Page)
L
H
Valid
Valid
H/L
H/L
H
H
H
X
H/L
Write
H
L
Valid
Valid
L
L
H
H
H
X
*note
Write(Upper Byte)
H
H
L
H
H
H
H
L
Valid
Invalid(
DQ0-8)
Valid(DQ
9-15)
Valid(DQ
0-8)
Invalid(
DQ9-15)
High-Z
High-Z
X
L
H
H
H
H
X
*note
H
H
H
H
L
H
Write(Lower Byte)
H
H
L
H
H
H
H
L
Valid
H
L
H
H
H
X
*note
H
H
H
H
L
H
Standby
PowerDown
Output Disable
H
H
H
H
H
H
H
X
L
H
L
H
H
X
L
H
L
H
H
X
H
H
X
H
X
X
X
X
X
X
X
X
X
H
H
H
H
H
H
H
H
H
X
X
X
*note
X
*note
Operation(Syncronous) -
pSRAM
CE#f1
H
H
H
H
CE#f2
H
H
H
H
CE#1pS_1
CE2pS_1
CE#1pS_2
CE2pS_2
H
L
H
H
H
L
H
H
OE#
WE#
Addr
DQ15-
DQ0
UB#
LB#
RESET#
WP#
ACC#
CLK(See
Note)
AVD#
Load Starting Burst
Adress
H
H
H
H
H
L
H
L
X
H
Valid
Data
X
X
H
H
H
Advance Burst Read to
Next Address
L
H
X
Data
X
X
H
H
H
H
Terminate current Burst
read cycle
"Terminate current Burst
read cycle and start new
Burst read cycle"
H
H
H
H
H
H
X
H
X
High-Z
X
X
H
H
H
X
H
H
H
L
H
L
X
H
Valid
Valid
X
X
H
H
H
H
H
H
H
H
H
相关PDF资料
PDF描述
S71WS512N80BAEZZ3 Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt
S71WS512N80BAIZZ0 Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt
S71WS512N80BAIZZ2 Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt
S71WS512N80BAIZZ3 Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt
S71WS512N80BAWZZ0 Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt
相关代理商/技术参数
参数描述
S71WS512N80BAEZZ3 制造商:SPANSION 制造商全称:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt
S71WS512N80BAIZZ0 制造商:SPANSION 制造商全称:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt
S71WS512N80BAIZZ2 制造商:SPANSION 制造商全称:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt
S71WS512N80BAIZZ3 制造商:SPANSION 制造商全称:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt
S71WS512N80BAWZZ0 制造商:SPANSION 制造商全称:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt
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