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参数资料
| 型号： | S83C196MD |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80 |
| 封装： | EIAJ, SHRINK, QFP-80 |
| 文件页数： | 2/25页 |
| 文件大小： | 1306K |
| 代理商： | S83C196MD |
8XC196MD
PIN DESCRIPTIONS (Alphabetically Ordered) (Continued)
Symbol
Function
PORT2
8-bit bidirectional IO port All of the Port2 pins are shared with the EPA IO
pins (CAPCOMP0 – 3 and COMPARE0 – 3)
PORT3
8-bit bidirectional IO ports with open drain outputs These pins are shared
with the multiplexed addressdata bus which uses strong internal pullups
PORT4
PORT5
8-bit bidirectional IO port 7 of the pins are shared with bus control signals
(ALE INST WR RD BHE READY BUSWIDTH) Can be used as standard
IO
PORT6
8-bit output port P66 and P67 output PWM the others are used as the Wave
Form Generator outputs Can be used as standard output ports
PORT7
8-bit bidirectional IO port P70 – P73 can be used as EPA IO pins
(CAPCOMP4 – 5 and COMPARE4 – 5) P77 can be used as FREQOUT output
pin P74 – P76 are standard IO pins
PWM0 PWM1
Programmable duty cycle Programmable frequency Pulse Width Modulator
pins The duty cycle has a resolution of 256 steps and the frequency can vary
(P66 P67)
from 122 Hz to 31 KHz (16 MHz input clock) Pins may be configured as
standard output if PWM is not used
RD (P53)
Read signal output to external memory RD is low only during external memory
reads Can be used as standard IO when not used as RD
READY (P56)
Ready input to lengthen external memory cycles If READY e 0 the memory
controller inserts wait states until the next positive transition of CLKOUT
occurs with READY e 1 Can be used as standard IO when not used as
READY
RESET
Reset input to and open-drain output from the chip Held low for at least 16
state times to reset the chip Input high for normal operation RESET has an
Ohmic internal pullup resistor
T1CLK
Timer 1 Clock input This pin has two other alternate functions ACH10 and
P12
(P12)
T1DIR
Timer 1 Direction input This pin has two other alternate functions ACH11 and
P13
(P13)
VPP
The programming voltage is applied to this pin It is also the timing pin for the
return from Power Down circuit Connect this pin with a 1 mF capacitor to VSS
anda1MX resistor to VCC If the Power Down feature is not used connect
the pin to VCC
WG1 – WG3WG1 – WG3
3 phase output signals and their complements used in motor control
applications The pins can also be configured as standard output pins
(P60 – P65)
WR WRL (P52)
Write and Write Low output to external memory WR will go low every external
write WRL will go low only for external writes to an even byte Can be used as
standard IO when not used as WR WRL
XTAL1
Input of the oscillator inverter and the internal clock generator This pin should
be used when using an external clock source
XTAL2
Output of the oscillator inverter
PMODE
Determines the EPROM programming mode
(P04 – 7)
PACT
A low signal in Auto Programming mode indicates that programming is in
process A high signal indicates programming is complete
(P25)
10
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