Chapter 13 FlexRay Communication Controller (FLEXRAY)
MC9S12XF - Family Reference Manual, Rev.1.19
474
Freescale Semiconductor
Write: Anytime
This register is used to assign the individual protocol timing related strobe signals given in
Table 13-13 to
the external strobe ports. Each strobe signal can be assigned to at most one strobe port. Each write access
to registers overwrites the previously written ENB and STBPSEL values for the signal indicated by SEL.
If more than one strobe signal is assigned to one strobe port, the current values of the strobe signals are
combined with a binary OR and presented at the strobe port. If no strobe signal is assigned to a strobe port,
NOTE
In single channel device mode, channel B related strobe signals are
undened and should not be assigned to the strobe ports.
.;
Table 13-12. STBSCR Field Descriptions
Field
Description
15
WMD
Write Mode — This control bit denes the write mode of this register.
0 Write to all elds in this register on write access.
1 Write to SEL eld only on write access.
14–8
SEL
Strobe Signal Select — This control eld selects one of the strobe signals given in
Table 13-13 to be enabled
or disabled and assigned to one of the four strobe ports given in
Table 13-13.4
ENB
Strobe Signal Enable — The control bit is used to enable and to disable the strobe signal selected by
STBSSEL.
0 Strobe signal is disabled and not assigned to any strobe port.
1 Strobe signal is enabled and assigned to the strobe port selected by STBPSEL.
1–0
STBPSEL
Strobe Port Select — This eld selects the strobe port that the strobe signal selected by the SEL is assigned
to. All strobe signals that are enabled and assigned to the same strobe port are combined with a binary OR
operation.
00 assign selected signal to STB0
01 assign selected signal to STB1
10 assign selected signal to STB2
11 assign selected signal to STB3
Table 13-13. Strobe Signal Mapping (Sheet 1 of 3)
SEL
Description
Channel
Type
Offset(1)
Reference
dec
hex
0
0x00
poc_startup_state[0] (for coding see PSR0[4])
-
value
0
MT start
1
0x01
poc_startup_state[1] (for coding see PSR0[5])
2
0x02
poc_startup_state[2] (for coding see PSR0[6])
3
0x03
poc_startup_state[3] (for coding see PSR0[7])
4
0x04
poc_state[0] (for coding see PSR0[8])
5
0x05
poc_state[1] (for coding see PSR0[9])
6
0x06
poc_state[2] (for coding see PSR0[10])
7
0x07
channel idle indicator
A
level
+5
RXD_A
8
0x08
B
RXD_B
9
0x09
receive data after glitch ltering
A
value
+4
RXD_A
10
0x0A
B
RXD_B