参数资料
| 型号： | SA5232D/01,118 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 6/10页 |
| 文件大小： | 0K |
| 描述： | IC OP AMP HP LOW VOLT 8SOIC |
| 标准包装： | 2,500 |
| 放大器类型： | 通用 |
| 电路数： | 2 |
| 输出类型： | 满摆幅 |
| 转换速率： | 0.8 V/µs |
| -3db带宽： | 2.5MHz |
| 电流 - 输入偏压： | 90nA |
| 电压 - 输入偏移： | 200µV |
| 电流 - 电源： | 1.4mA |
| 电流 - 输出 / 通道： | 12mA |
| 电压 - 电源，单路/双路(±)： | 2 V ~ 5.5 V，±1 V ~ 2.75 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SO |
| 包装： | 带卷 (TR) |
| 其它名称： | 935275253118 SA5232D/01-T SA5232D/01-T-ND |
Philips Semiconductors
Product data
NE/SA/AU5232
Matched dual high-performance
low-voltage operational amplifier
2002 May 21
5
DC ELECTRICAL CHARACTERISTICS
VCC = 2 V to 5.5 V, VEE = 0 V, Tamb = 25 °C; VEE < Vi(CM) < VCC; unless otherwise stated.
TEST CONDITIONS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
AU5232
UNIT
MIN
TYP
MAX
VCC = 5.5V
1.4
2.0
ICC
Supply current
VCC = 5.5 V;
over full temp. range
1.6
2.4
mA
VOS
Offset voltage
±0.2
±4
mV
VOS
Offset voltage
Over full temp. range
±0.6
±5
mV
VOS/T Offset voltage drift with temperature
4
V/°C
VOS
Offset voltage difference between any amplifiers in the
0.4
3
mV
VOS
gy
same package at the same common mode level1
Over full temp. range
1.2
4
mV
IOS
Offset current
±3
±30
nA
IOS
Offset current
Over full temp. range
±6
±60
nA
IOS/T Offset current drift with temperature
0.03
±.3
nA/
°C
1
VEE < Vi(CM) < VEE +0.5 V
–200
–90
I
Input bias current1
Over full temp. range
–250
–150
nA
IB
Input bias current1
VEE +1 V < Vi(CM) < VCC
25
75
nA
Over full temp. range
35
120
IB/T
Input bias current drift with temperature
0.5
nA/
°C
VEE < Vi(CM) < VEE +0.5 V
10
30
IB
Input bias current difference between any amplifier in the
Over full temp. range
50
70
nA
y
same package at the same common mode level.
VEE +1 V < Vi(CM) < VCC
5
20
nA
Over full temp. range
25
50
VOS ≤ 6 mV
VEE–0.25
VCC+0.25
Vi(CM)
Common-mode input range
VOS ≤ 6 mV;
Over full temp. range
VEE–0.1
VCC+0.1
V
Common-mode rejection ratio, small signal
VEE < Vi(CM) < VEE+0.5V;
VEE+1V < Vi(CM) < VCC
80
100
CMRR
j,
g
Over full temp. range
70
dB
Common mode rejection ratio large signal
VEE < Vi(CM) < VCC
65
90
Common-mode rejection ratio, large signal
Over full temp. range
55
PSRR
Power supply rejection ratio
VEE < Vi(CM) < VCC
80
100
dB
PSRR
Power supply rejection ratio
Over full temp. range
75
90
dB
I
Peak load current sink and source
10
12
mA
IL
Peak load current, sink and source
Over full temp. range
5
8
mA
A O
Open loop voltage gain
90
110
dB
AVOL
Open-loop voltage gain
Over full temp. range
90
dB
IPEAK = 0.1 mA
VEE+0.1
VCC–0.1
Output voltage swing
IPEAK = 10 mA
VEE+0.25
VCC–0.25
V
VOUT
Out ut voltage swing
IPEAK = 5 mA;
over full temp. range
VEE+0.2
VCC–0.2
V
Output voltage swing for
RL = 2 k
VEE+0.2
VCC–0.2
V
gg
VCC = 2.75 V, VEE = –2.75 V
RL = 600
VEE+0.25
VCC–0.25
V
NOTE:
1. These parameters are measured for VEE < VCM < VEE+0.5 V and for VEE+1 V < VCM < VCC. By design these parameters are intermediate
for common mode ranges between the measured regions.
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