参数资料
型号: SAA7134HL
厂商: NXP Semiconductors N.V.
元件分类: 通用总线功能
英文描述: PCI audio and video broadcast decoder
文件页数: 12/51页
文件大小: 233K
代理商: SAA7134HL
SAA7134HL_4
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 04 — 31 March 2006
12 of 51
Philips Semiconductors
SAA7134HL
PCI audio and video broadcast decoder
[1]
The SAA7134HL offers a peripheral interface with General Purpose Input/Output (GPIO) pins. Dedicated
functions can be selected:
a) Digital Video Port (VP): output only; in 8-bit and 16-bit formats, such as VMI, DMSD (ITU-R BT.601);
zoom-video, with discrete sync signals; ITU-R BT.656 VIP (1.1 and 2.0), with sync encoded in SAV and
EAV codes.
b) Transport Stream (TS) capture input: from the peripheral DTV/DVB channel decoder; synchronized by
Start Of Packet (SOP); in byte-parallel or bit-serial protocol.
c) Digitized raw DTV/DVB samples stream output: from internal ADCs; to feed the peripheral DTV/DVB
channel decoder.
d) GPIO: as default (no other function selected); static (no clock); read and write from or to individually
selectable pins; latching ‘strap’ information at system reset time.
e) Peripheral interrupt (INT) input: enabled by interrupt enable register; routed to PCI interrupt (INT_A).
5.2.1
Pin type description
GPIO19
60
GIO
-
TS_SOP
(packet start)
-
-
R/W
GPIO18
61
GIO
VAUX2
X_CLK_IN
R/W,
INT
R/W
R/W,
INT
R/W
GPIO17
GPIO16
67
68
GIO
GIO
VAUX1 (e.g. VACTIVE)
-
-
TS_VAL (valid
flag)
-
ADC_Y[0] (LSB)
-
GPIO15 to
GPIO8
69 to
72
and
75 to
78
79 to
86
GIO
VP[7:0] for formats:
ITU-R BT.656 VMI,
VIP (1.1, 2.0), etc.
ADC_Y[8:1]
GPIO7 to
GPIO0
GIO
VP extension for 16-bit
formats: ZV, VIP-2,
DMSD, etc.
TS_P_D[7:0]
(byte-parallel
data)
ADC_C[8:1]
R/W
Table 9:
Symbol
GPIO pins and functions
[1]
…continued
Pin
Type
Function
Audio and video port
outputs
TS capture
inputs
Raw DTV/DVB
outputs
GPIO
Table 10:
Pin type
AG
AI
AO
AR
AS
CI
CO
GI
GIO
GO
I
IO2
Characteristics of pin types and remarks
Description
analog ground
analog input; video, audio and sound
analog output
analog reference support pin
analog supply voltage (3.3 V)
CMOS input; 3.3 V level (not 5 V tolerant)
CMOS output; 3.3 V level (not 5 V tolerant)
digital input (GPIO); 3.3 V level (5 V tolerant)
digital input/output (GPIO); 3.3 V level (5 V tolerant)
digital output (GPIO); 3.3 V level (5 V tolerant)
JTAG test input
digital input and output of the I
2
C-bus interface; 3.3 V and 5 V
compatible, auto-adapting
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