参数资料
型号: SAA7706H/N210,557
厂商: NXP Semiconductors
文件页数: 15/52页
文件大小: 0K
描述: IC CAR RADIO DSP 80-QFP
标准包装: 330
类型: 汽车信号处理器
接口: I²C,I²:S,LSB,SPDIF
电压 - 输入/输出: 3.30V
电压 - 核心: 3.30V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 80-BQFP
供应商设备封装: 80-QFP(14x20)
包装: 托盘
其它名称: 935270285557
SAA7706H/N210
SAA7706H/N210-ND
2001 Mar 05
22
Philips Semiconductors
Product specication
Car radio Digital Signal Processor (DSP)
SAA7706H
8.7.3
FUNCTION OF PIN POM
With pin POM it is possible to switch off the reference
current of the DAC. The capacitor on pin POM determines
the time after which this current has a soft switch-on. So at
power-on the current audio signal outputs are always
muted. The loading of the external capacitor is done in two
stages via two different current sources. The loading starts
at a current level that is lower than the current loading after
the voltage on pin POM has past a particular level. This
results in an almost dB-linear behaviour. This must
prevent ‘plop’ effects during power on or off.
8.7.4
POWER-OFF PLOP SUPPRESSION
To avoid plops in a power amplifier, the supply voltage of
the analog part of the DAC and the rest of the chip can be
fed from a separate power supply of 3.3 V. A capacitor
connected to this power supply enables to provide power
to the analog part at the moment the digital voltage is
switching off fast. In this event the output voltage will
decrease gradually allowing the power amplifier some
extra time to switch off without audible plops.
8.7.5
PIN VREFDA FOR INTERNAL REFERENCE
With two internal resistors half the supply voltage VDDA2 is
obtained and used as an internal reference. This reference
voltage is used as DC voltage for the output operational
amplifiers and as reference for the DAC.
In order to obtain the lowest noise and to have the best
ripple rejection, a filter capacitor has to be added between
this pin and ground, preferably close to the analog
pin VSSA2.
8.7.6
SUPPLY OF THE FILTER STREAM DAC
The entire analog circuitry of the DACs and the operational
amplifiers are supplied by 2 supply pins: VDDA2 and VSSA2.
VDDA2 must have sufficient decoupling to prevent total
harmonic distortion degradation and to ensure a good
power supply rejection ratio. The digital part of the DAC is
fully supplied from the chip core supply.
8.8
Clock circuit and oscillator
The chip has an on-chip crystal clock oscillator. The block
diagram of this Pierce oscillator is shown in Fig.13. The
active element needed to compensate for the loss
resistance of the crystal is the block Gm. This block is
placed between the external pins OSC_IN
and OSC_OUT. The gain of the oscillator is internally
controlled by the AGC block. A sine wave with a
peak-to-peak voltage close to the oscillator power supply
voltage is generated. The AGC block prevents clipping of
the sine wave and therefore the higher harmonics are as
low as possible. At the same time the voltage of the sine
wave is as high as possible which reduces the jitter going
from sine wave to the clock signal.
handbook, full pagewidth
MGT469
AGC
Gm
Rbias
C2
C1
clock to circuit
on-chip
off-chip
OSC_IN
OSC_OUT
63
64
VDD(OSC)
0.5VDD(OSC)
VSS(OSC)
65
62
Fig.13 Block diagram oscillator circuit.
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