参数资料
型号: SAB-C161O-L25M HA
厂商: Infineon Technologies
文件页数: 36/66页
文件大小: 0K
描述: IC MICROCONTROLLER 16BIT MQFP80
标准包装: 850
系列: C16xx
核心处理器: C166
芯体尺寸: 16-位
速度: 25MHz
连通性: EBI/EMI,SPI,UART/USART
外围设备: POR,PWM,WDT
输入/输出数: 63
程序存储器类型: ROMless
RAM 容量: 2K x 8
电压 - 电源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振荡器型: 外部
工作温度: 0°C ~ 70°C
封装/外壳: 80-QFP
包装: 带卷 (TR)
其它名称: B161OL25MHAXT
C161OL25MHABAUMA1
C161OL25MHABXUMA1
SABC161OL25MHAXT
SP000014268
C161K
C161O
Data Sheet
37
V2.0, 2001-01
Prescaler Operation
When prescaler operation is configured (CLKCFG = 1XXB) the CPU clock is derived
from the internal oscillator (input clock signal) by a 2:1 prescaler.
The frequency of
fCPU is half the frequency of fOSC and the high and low time of fCPU (i.e.
the duration of an individual TCL) is defined by the period of the input clock
fOSC.
The timings listed in the AC Characteristics that refer to TCLs therefore can be
calculated using the period of
fOSC for any TCL.
Direct Drive
When direct drive is configured (CLKCFG = 0XXB) the CPU clock is directly driven from
the internal oscillator with the input clock signal.
The frequency of
fCPU directly follows the frequency of fOSC so the high and low time of
fCPU (i.e. the duration of an individual TCL) is defined by the duty cycle of the input clock
fOSC.
The timings listed below that refer to TCLs therefore must be calculated using the
minimum TCL that is possible under the respective circumstances. This minimum value
can be calculated via the following formula:
TCLmin = 1/fOSC × DCmin
(DC = duty cycle)
For two consecutive TCLs the deviation caused by the duty cycle of
fOSC is compensated
so the duration of 2TCL is always 1/
fOSC. The minimum value TCLmin therefore has to
be used only once for timings that require an odd number of TCLs (1, 3, …). Timings that
require an even number of TCLs (2, 4, …) may use the formula 2TCL = 1/
fOSC.
Table 9
C161K/O Clock Generation Modes
CLKCFG
(P0H.7-5)
CPU Frequency
fCPU = fOSC × F
External Clock
Input Range
Notes
0X X
fOSC × 1
1 to 25 MHz
Direct drive1)
1X X
fOSC / 2
2 to 50 MHz
CPU clock via prescaler
1) The maximum frequency depends on the duty cycle of the external clock signal.
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