- 您现在的位置：买卖IC网 > PDF目录98074 > SAB-C161S-L25M (INFINEON TECHNOLOGIES AG) 16-BIT, 25 MHz, MICROCONTROLLER, PQFP80 PDF资料下载
参数资料
| 型号： | SAB-C161S-L25M |
| 厂商： | INFINEON TECHNOLOGIES AG |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, 25 MHz, MICROCONTROLLER, PQFP80 |
| 封装： | PLASTIC, MQFP-80 |
| 文件页数： | 44/75页 |
| 文件大小： | 1315K |
| 代理商： | SAB-C161S-L25M |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页当前第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页
C161S
Timing Characteristics
Data Sheet
45
V1.0, 2003-11
levels present on the upper half of PORT0 (P0H), i.e. bitfield CLKCFG represents the
logic levels on pins P0.15-13 (P0H.7-5).
Table 13 associates the combinations of these three bits with the respective clock
generation mode.
Prescaler Operation
When prescaler operation is configured (CLKCFG = 001
B) the CPU clock is derived from
the internal oscillator (input clock signal) by a 2:1 prescaler.
The frequency of
f
CPU is half the frequency of fOSC and the high and low time of fCPU (i.e.
the duration of an individual TCL) is defined by the period of the input clock
f
OSC.
The timings listed in the AC Characteristics that refer to TCLs therefore can be
calculated using the period of
f
OSC for any TCL.
Phase Locked Loop
When PLL operation is configured (via CLKCFG) the on-chip phase locked loop is
enabled and provides the CPU clock (see Table 13). The PLL multiplies the input
frequency by the factor F which is selected via the combination of pins P0.15-13 (i.e.
f
CPU
=
f
OSC × F). With every F’th transition of fOSC the PLL circuit synchronizes the CPU clock
to the input clock. This synchronization is done smoothly, i.e. the CPU clock frequency
does not change abruptly.
Due to this adaptation to the input clock the frequency of
f
CPU is constantly adjusted so
it is locked to
f
OSC. The slight variation causes a jitter of fCPU which also effects the
duration of individual TCLs.
Table 13
C161S Clock Generation Modes
CLKCFG
(P0H.7-5)
CPU Frequency
f
CPU = fOSC × F
External Clock
Input Range
1)
1) The external clock input range refers to a CPU clock range of 10 … 25 MHz (PLL operation). If the on-chip
oscillator is used together with a crystal, the oscillator frequency is limited to a range of 4 MHz to 16 MHz.
Notes
1 1 1
f
OSC × 4
2.5 to 6.25 MHz
Default configuration
1 1 0
f
OSC × 3
3.33 to 8.33 MHz
–
1 0 1
f
OSC × 2
5 to 12.5 MHz
–
1 0 0
f
OSC × 5
2 to 5 MHz
–
0 1 1
f
OSC × 1
1 to 25 MHz
Direct drive
2)
2) The maximum frequency depends on the duty cycle of the external clock signal.
0 1 0
f
OSC × 1.5
6.66 to 16.67 MHz
–
0 0 1
f
OSC / 2
2 to 50 MHz
CPU clock via prescaler
0 0 0
f
OSC × 2.5
4 to 10 MHz
–
相关PDF资料 |
PDF描述 |
|---|---|
| SAF-C501G-LN | 8-BIT, 12 MHz, MICROCONTROLLER, PQCC44 |
| SAF-C501G-LN | 8-BIT, 12 MHz, MICROCONTROLLER, PQCC44 |
| SAF-C504-L24M | 8-BIT, 24 MHz, MICROCONTROLLER, PQFP44 |
| SAF-C504-L40M | 8-BIT, 40 MHz, MICROCONTROLLER, PQFP44 |
| SAF-C505A-4EM | 8-BIT, OTPROM, 20 MHz, MICROCONTROLLER, PQFP44 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SAB-C161S-L25M AA | 功能描述:16位微控制器 - MCU 16-Bit Single-Chip 5V 25MHz ROM less RoHS:否 制造商:Texas Instruments 核心:RISC 处理器系列:MSP430FR572x 数据总线宽度:16 bit 最大时钟频率:24 MHz 程序存储器大小:8 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:VQFN-40 安装风格:SMD/SMT |
| SABC161SL25MAAXT | 制造商:Infineon Technologies AG 功能描述:MCU 16-Bit C166 CISC/RISC ROMLess 5V 80-Pin MQFP |
| SAB-C161S-LM 3V | 制造商:Infineon Technologies AG 功能描述:16BIT MCU ROM/ROMLESS MQFP80 161 |
| SAB-C161S-LM 3V AA | 功能描述:16位微控制器 - MCU 16-Bit Single-Chip 3.3V 20MHz ROM less RoHS:否 制造商:Texas Instruments 核心:RISC 处理器系列:MSP430FR572x 数据总线宽度:16 bit 最大时钟频率:24 MHz 程序存储器大小:8 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:VQFN-40 安装风格:SMD/SMT |
| SAB-C161S-LM3V | 制造商:INFINEON 制造商全称:Infineon Technologies AG 功能描述:16-Bit Single-Chip Microcontroller |
发布紧急采购，3分钟左右您将得到回复。