C161CS/JC/JI
Derivatives
Architectural Overview
User’s Manual
2-17
V3.0, 2001-02
A/D Converter
For analog signal measurement, a 10-bit A/D converter with 12 multiplexed input
channels and a sample and hold circuit has been integrated on-chip. It uses the method
of successive approximation. The sample time (for loading the capacitors) and the
conversion time is programmable and can so be adjusted to the external circuitry.
Overrun error detection/protection is provided for the conversion result register
(ADDAT): either an interrupt request will be generated when the result of a previous
conversion has not been read from the result register at the time the next conversion is
complete, or the next conversion is suspended in such a case until the previous result
has been read.
For applications which require less analog input channels, the remaining channel inputs
can be used as digital input (or IO) port pins.
The A/D converter of the C161CS/JC/JI supports four different conversion modes. In the
standard Single Channel conversion mode, the analog level on a specified channel is
sampled once and converted to a digital result. In the Single Channel Continuous mode,
the analog level on a specified channel is repeatedly sampled and converted without
software intervention. In the Auto Scan mode, the analog levels on a prespecified
number of channels are sequentially sampled and converted. In the Auto Scan
Continuous mode, the number of prespecified channels is repeatedly sampled and
converted. In addition, the conversion of a specific channel can be inserted (injected) into
a running sequence without disturbing this sequence. This is called Channel Injection
Mode.
The Peripheral Event Controller (PEC) may be used to automatically store the
conversion results into a table in memory for later evaluation, without requiring the
overhead of entering and exiting interrupt routines for each data transfer.
Real Time Clock
The C161CS/JC/JI contains a real time clock (RTC) which serves for different purposes:
System clock to determine the current time and date,
even during idle mode and power down mode (optionally)
Cyclic time based interrupt, e.g. to provide a system time tick independent of the CPU
frequency without loading the general purpose timers, or to wake up regularly from
idle mode.
48-bit timer for long term measurements,
the maximum usable timespan is more than 100 years.
The RTC module consists of a chain of 3 divider blocks, a fixed 8:1 divider, the
reloadable 16-bit timer T14 and the 32-bit RTC timer (accessible via registers RTCH and
RTCL). Both timers count up.