参数资料
型号: SAF-C868-1RR
厂商: INFINEON TECHNOLOGIES AG
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 40 MHz, MICROCONTROLLER, PDSO38
封装: PLASTIC, TSSOP-38
文件页数: 14/70页
文件大小: 1067K
代理商: SAF-C868-1RR
C868
Data Sheet
21
V 0.2, 2002-01
The PLL output frequency is determined by:
[1]
The range for the VCO frequency is given by:
100 MHz
≤ f
VCO ≤ 160 MHz
[2]
The relationship between the input frequency and VCO frequency is given by:
[3]
This gives the range for the input frequency which is given by:
6.67 MHz
≤ f
OSC ≤ 10.67 MHz
[4]
Table 5
Output Frequencies
fPLL Derived from Various Output Factors
K-Factor
fPLL
Duty
Cycle [%]
Jitter
Selected
Factor
KDIV
fVCO =
100 MHz
fVCO =
160 MHz
2000B
50
80
50
linear depending on fVCO
at fVCO =100MHz: +/-300ps
at fVCO =160MHz: +/-250ps
additional jitter for odd Kdiv
factors tbd.
4010B
25
40
50
51)
1)
These odd factors should not be used (not tested because off the unsymmetrical duty cycle).
2)
Shaded combinations should not be used because they are above the maximum CPU frequency of 40MHz.
011B
20
32
40
6100B
16.67
26.67
50
8101B
12.5
20
50
110B
11.11
17.78
44
10
111B
10
16
50
16
001B
6.25
10
50
fPLL = fVCO / K =
× f
OSC
15
K
fVCO =15 × fOSC
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