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| 型号： | SAK-C164SV-2RF |
| 厂商： | INFINEON TECHNOLOGIES AG |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP64 |
| 封装： | PLASTIC, TQFP-64 |
| 文件页数： | 44/65页 |
| 文件大小： | 932K |
| 代理商： | SAK-C164SV-2RF |
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C164SV
Data Sheet
45
V1.0, 2003-04
Preliminary
AC Characteristics
Definition of Internal Timing
The internal operation of the C164SV is controlled by the internal CPU clock
fCPU. Both
edges of the CPU clock can trigger internal (e.g. pipeline) or external (e.g. bus cycles)
operations.
The specification of the external timing (AC Characteristics) therefore depends on the
time between two consecutive edges of the CPU clock, called “TCL” (see Figure 10).
Figure 10
Generation Mechanisms for the CPU Clock
The CPU clock signal
fCPU can be generated from the oscillator clock signal fOSC via
different mechanisms. The duration of TCLs and their variation (and also the derived
external timing) depends on the used mechanism to generate
fCPU. This influence must
be regarded when calculating the timings for the C164SV.
Note: The example for PLL operation shown in Figure 10 refers to a PLL factor of 4.
The used mechanism to generate the basic CPU clock is selected by bitfield CLKCFG
in register RP0H.7-5.
Upon a long hardware reset register RP0H is loaded with the logic levels present on the
upper half of PORT0 (P0H), i.e. bitfield CLKCFG represents the logic levels on pins
MCT04338
f
OSC
f
CPU
Phase Locked Loop Operation
TCL
f
OSC
f
CPU
Direct Clock Drive
f
OSC
f
CPU
Prescaler Operation
TCL
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相关代理商/技术参数 |
参数描述 |
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| SAK-C167CR-16R33M | 制造商:INFINEON 制造商全称:Infineon Technologies AG 功能描述:16-Bit Single-Chip Microcontroller |
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| SAK-C167CR-4R33M | 制造商:INFINEON 制造商全称:Infineon Technologies AG 功能描述:16-Bit Single-Chip Microcontroller |
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