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| 型号： | SAK-XC161CS-32F40F |
| 厂商： | INFINEON TECHNOLOGIES AG |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP144 |
| 封装： | 0.50 MM PITCH, GREEN, PLASTIC, TQFP-144 |
| 文件页数： | 44/87页 |
| 文件大小： | 1247K |
| 代理商： | SAK-XC161CS-32F40F |
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XC161CS-32F
Derivatives
Functional Description
Data Sheet
47
V1.2, 2006-08
3.15
Clock Generation
The Clock Generation Unit uses a programmable on-chip PLL with multiple prescalers
to generate the clock signals for the XC161 with high flexibility. The master clock
f
MC is
the reference clock signal, and is used for TwinCAN and is output to the external system.
The CPU clock
f
CPU and the system clock fSYS are derived from the master clock either
directly (1:1) or via a 2:1 prescaler (
f
The on-chip oscillator can drive an external crystal or accepts an external clock signal.
The oscillator clock frequency can be multiplied by the on-chip PLL (by a programmable
factor) or can be divided by a programmable prescaler factor.
If the bypass mode is used (direct drive or prescaler) the PLL can deliver an independent
clock to monitor the clock signal generated by the on-chip oscillator. This PLL clock is
independent from the XTAL1 clock. When the expected oscillator clock transitions are
missing the Oscillator Watchdog (OWD) activates the PLL Unlock/OWD interrupt node
and supplies the CPU with an emergency clock, the PLL clock signal. Under these
circumstances the PLL will oscillate with its basic frequency.
The oscillator watchdog can be disabled by switching the PLL off. This reduces power
consumption, but also no interrupt request will be generated in case of a missing
oscillator clock.
Note: At the end of an external reset (EA = ‘0’) the oscillator watchdog may be disabled
via hardware by (externally) pulling the RD line low upon a reset, similar to the
standard reset configuration.
3.16
Parallel Ports
The XC161 provides up to 99 I/O lines which are organized into nine input/output ports
and one input port. All port lines are bit-addressable, and all input/output lines are
individually (bit-wise) programmable as inputs or outputs via direction registers. The I/O
ports are true bidirectional ports which are switched to high impedance state when
configured as inputs. The output drivers of some I/O ports can be configured (pin by pin)
for push/pull operation or open-drain operation via control registers. During the internal
reset, all port pins are configured as inputs (except for pin RSTOUT).
The edge characteristics (shape) and driver characteristics (output current) of the port
drivers can be selected via registers POCONx.
The input threshold of some ports is selectable (TTL or CMOS like), where the special
CMOS like input threshold reduces noise sensitivity due to the input hysteresis. The
input threshold may be selected individually for each byte of the respective ports.
All port lines have programmable alternate input or output functions associated with
them. All port lines that are not used for these alternate functions may be used as general
purpose IO lines.
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| SAK-XC161CS-32F20F | 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP144 |
| SAK-XC164CS-8F40F | 16-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP100 |
| SAF-XC164CS-16R40F | 16-BIT, MROM, 40 MHz, MICROCONTROLLER, PQFP100 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SAK-XC161CS-32F40F BB-A | 功能描述:16位微控制器 - MCU 16 BIT SNGL CHIP 5V 40MHz Flash RoHS:否 制造商:Texas Instruments 核心:RISC 处理器系列:MSP430FR572x 数据总线宽度:16 bit 最大时钟频率:24 MHz 程序存储器大小:8 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:VQFN-40 安装风格:SMD/SMT |
| SAK-XC161CS-32F40F BB-ATR | 制造商:Infineon Technologies AG 功能描述: |
| SAK-XC164CB-32F20F | 制造商:INFINEON 制造商全称:Infineon Technologies AG 功能描述:16-Bit Single-Chip Microcontroller with C166SV2 Core |
| SAK-XC164CB-32F40F | 制造商:INFINEON 制造商全称:Infineon Technologies AG 功能描述:16-Bit Single-Chip Microcontroller with C166SV2 Core |
| SAK-XC164CL-32F20F | 制造商:INFINEON 制造商全称:Infineon Technologies AG 功能描述:16-Bit Single-Chip Microcontroller with C166SV2 Core |
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