参数资料
型号: SAK-XC2265N-24F80L
厂商: INFINEON TECHNOLOGIES AG
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP100
封装: 0.50 MM PITCH, GREEN, PLASTIC, LQFP-100
文件页数: 70/131页
文件大小: 1627K
代理商: SAK-XC2265N-24F80L
XC2261N/68N, XC2263N/64N/65N
XC2000 Family / Value Line
Functional Description
Data Sheet
43
V1.4, 2011-07
Up to 16 Kbytes of on-chip Data SRAM (DSRAM) are used for storage of general user
data. The DSRAM is accessed via a separate interface and is optimized for data access.
Note: The actual size of the DSRAM depends on the quoted device type.
2 Kbytes of on-chip Dual-Port RAM (DPRAM) provide storage for user-defined
variables, for the system stack, and for general purpose register banks. A register bank
can consist of up to 16 word-wide (R0 to R15) and/or byte-wide (RL0, RH0, …, RL7,
RH7) General Purpose Registers (GPRs).
The upper 256 bytes of the DPRAM are directly bit addressable. When used by a GPR,
any location in the DPRAM is bit addressable.
8 Kbytes of on-chip Stand-By SRAM (SBRAM) provide storage for system-relevant
user data that must be preserved while the major part of the device is powered down.
The SBRAM is accessed via a specific interface and is powered in domain M.
1024 bytes (2
× 512 bytes) of the address space are reserved for the Special Function
Register areas (SFR space and ESFR space). SFRs are word-wide registers which are
used to control and monitor functions of the different on-chip units. Unused SFR
addresses are reserved for future members of the XC2000 Family. In order to ensure
upward compatibility they should either not be accessed or written with zeros.
In order to meet the requirements of designs where more memory is required than is
available on chip, up to 12 Mbytes (approximately, see Table 8) of external RAM and/or
ROM can be connected to the microcontroller. The External Bus Interface also provides
access to external peripherals.
The on-chip Flash memory stores code, constant data, and control data. The
320 Kbytes of on-chip Flash memory consist of 1 module of 64 Kbytes (preferably for
data storage) and 1 module of 256 Kbytes. Each module is organized in 4-Kbyte sectors.
The uppermost 4-Kbyte sector of segment 0 (located in Flash module 0) is used
internally to store operation control parameters and protection information.
Note: The actual size of the Flash memory depends on the chosen device type.
Each sector can be separately write protected
1), erased and programmed (in blocks of
128 Bytes). The complete Flash area can be read-protected. A user-defined password
sequence temporarily unlocks protected areas. The Flash modules combine 128-bit
read access with protected and efficient writing algorithms for programming and erasing.
Dynamic error correction provides extremely high read data security for all read access
operations. Access to different Flash modules can be executed in parallel.
For Flash parameters, please see Section 4.6.
1) To save control bits, sectors are clustered for protection purposes, they remain separate for
programming/erasing.
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