参数资料
型号: SAX-XC878M-13FFI5V
厂商: INFINEON TECHNOLOGIES AG
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 24 MHz, RISC MICROCONTROLLER, PQFP64
封装: PLASTIC, TQFP-64
文件页数: 73/141页
文件大小: 2385K
代理商: SAX-XC878M-13FFI5V
XC878CLM
Functional Description
Data Sheet
30
V1.1, 2009-08
3.2.3
Bit Protection Scheme
The bit protection scheme prevents direct software writing of selected bits (i.e., protected
bits) using the PASSWD register. When the bit field MODE is 11B, writing 10011B to the
bit field PASS opens access to writing of all protected bits, and writing 10101B to the bit
field PASS closes access to writing of all protected bits. In both cases, the value of the
bit field MODE is not changed even if PASSWD register is written with 98H or A8H. It can
only be changed when bit field PASS is written with 11000B, for example, writing D0H to
PASSWD register disables the bit protection scheme.
Note that access is opened for maximum 32 CCLKs if the “close access” password is not
written. If “open access” password is written again before the end of 32 CCLK cycles,
there will be a recount of 32 CCLK cycles. The protected bits include the N- and K-
Divider bits, NDIV and KDIV; the Watchdog Timer enable bit, WDTEN; and the power-
down and slow-down enable bits, PD and SD.
OP
[7:6]
w
Operation
0X
Manual page mode. The value of STNR is
ignored and PAGE is directly written.
10
New page programming with automatic page
saving. The value written to the bit positions of
PAGE is stored. In parallel, the previous
contents of PAGE are saved in the storage bit
field STx indicated by STNR.
11
Automatic restore page action. The value
written to the bit positions PAGE is ignored
and instead, PAGE is overwritten by the
contents of the storage bit field STx indicated
by STNR.
0
3r
Reserved
Returns 0 if read; should be written with 0.
Field
Bits
Type Description
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