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参数资料
| 型号： | SB80C188EB-20 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, 20 MHz, MICROPROCESSOR, PQFP80 |
| 封装： | SHRINK, QFP-80 |
| 文件页数： | 2/59页 |
| 文件大小： | 1928K |
| 代理商： | SB80C188EB-20 |
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80C186EB80C188EB 80L186EB80L188EB
Table 3 Pin Descriptions
Pin
Input
Output
Description
Name
Type
States
VCC
P
POWER
connections consist of four pins which must be
shorted externally to a VCC board plane
VSS
G
GROUND
connections consist of six pins which must be
shorted externally to a VSS board plane
CLKIN
I
A(E)
CLocK INput
is an input for an external clock An external
oscillator operating at two times the required processor
operating frequency can be connected to CLKIN For crystal
operation CLKIN (along with OSCOUT) are the crystal
connections to an internal Pierce oscillator
OSCOUT
O
H(Q)
OSCillator OUTput
is only used when using a crystal to
generate the external clock OSCOUT (along with CLKIN)
R(Q)
are the crystal connections to an internal Pierce oscillator
P(Q)
This pin is not to be used as 2X clock output for non-crystal
applications (ie this pin is NC for non-crystal applications)
OSCOUT does not float in ONCE mode
CLKOUT
O
H(Q)
CLocK OUTput
provides a timing reference for inputs and
outputs of the processor and is one-half the input clock
R(Q)
(CLKIN) frequency CLKOUT has a 50% duty cycle and
P(Q)
transistions every falling edge of CLKIN
RESIN
I
A(L)
RESet IN
causes the processor to immediately terminate
any bus cycle in progress and assume an initialized state All
pins will be driven to a known state and RESOUT will also
be driven active The rising edge (low-to-high) transition
synchronizes CLKOUT with CLKIN before the processor
begins fetching opcodes at memory location 0FFFF0H
RESOUT
O
H(0)
RESet OUTput
that indicates the processor is currently in
the reset state RESOUT will remain active as long as RESIN
R(1)
remains active
P(0)
PDTMR
IO
A(L)
H(WH)
Power-Down TiMeR
pin (normally connected to an external
capacitor) that determines the amount of time the processor
R(Z)
waits after an exit from power down before resuming normal
P(1)
operation The duration of time required will depend on the
startup characteristics of the crystal oscillator
NMI
I
A(E)
Non-Maskable Interrupt
input causes a TYPE-2 interrupt to
be serviced by the CPU NMI is latched internally
TEST BUSY
I
A(E)
TEST
is used during the execution of the WAIT instruction to
suspend CPU operation until the pin is sampled active
(TEST)
(LOW) TEST is alternately known as BUSY when interfacing
with an 80C187 numerics coprocessor (80C186EB only)
AD150
IO
S(L)
H(Z)
These pins provide a multiplexed Address and Data bus
During the address phase of the bus cycle address bits 0
(AD70)
R(Z)
through 15 (0 through 7 on the 80C188EB) are presented on
P(X)
the bus and can be latched using ALE 8- or 16-bit data
information is transferred during the data phase of the bus
cycle
NOTE
Pin names in parentheses apply to the 80C188EB80L188EB
10
相关PDF资料 |
PDF描述 |
|---|---|
| SB80C188EB-25 | 16-BIT, 25 MHz, MICROPROCESSOR, PQFP80 |
| S80L186EB-13 | 16-BIT, 13 MHz, MICROPROCESSOR, PQFP80 |
| SB80L188EB-13 | 16-BIT, 13 MHz, MICROPROCESSOR, PQFP80 |
| S80L188EB-16 | 16-BIT, 16 MHz, MICROPROCESSOR, PQFP80 |
| S80C186EB-25 | 16-BIT, 25 MHz, MICROPROCESSOR, PQFP80 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SB80C188EB25 | 功能描述:IC MPU 16-BIT 5V 25MHZ 80-SQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微处理器 系列:- 标准包装:2 系列:MPC8xx 处理器类型:32-位 MPC8xx PowerQUICC 特点:- 速度:133MHz 电压:3.3V 安装类型:表面贴装 封装/外壳:357-BBGA 供应商设备封装:357-PBGA（25x25） 包装:托盘 |
| SB80C188EB-25 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:16-Bit Microprocessor |
| SB80C188EC13 | 功能描述:IC MPU 16-BIT 5V 13MHZ 100-SQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微处理器 系列:- 标准包装:40 系列:MPC83xx 处理器类型:32-位 MPC83xx PowerQUICC II Pro 特点:- 速度:267MHz 电压:0.95 V ~ 1.05 V 安装类型:表面贴装 封装/外壳:516-BBGA 裸露焊盘 供应商设备封装:516-PBGAPGE（27x27） 包装:托盘 |
| SB80C188EC-13 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:16-Bit Microprocessor |
| SB80C188EC16 | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS |
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