参数资料
型号: SC120ULTRT
厂商: Semtech
文件页数: 25/32页
文件大小: 0K
描述: IC REG BOOST SYNC 3.3V/ADJ 6MLPD
标准包装: 1
类型: 升压(升压)
输出类型: 两者兼有
输出数: 1
输出电压: 3.3V,1.8 V ~ 5 V
输入电压: 0.7 V ~ 4.5 V
频率 - 开关: 1.2MHz
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 6-MLPD-UT
包装: 标准包装
供应商设备封装: 6-MLPD-UT(1.5x2.0)
产品目录页面: 1357 (CN2011-ZH PDF)
其它名称: SC120ULDKR
SC120
Applications Information (continued)
I L
on
1
L
DT
0
V IN dt
V IN D T
L
smallest and largest expected values of V IN . If the input
range includes V IN = 2 / 3 V OUT , also determine I PSAVE-entry-max .
Note that at high V IN (V IN close to V OUT ) PSAVE exit may
This is the change in I L during the on-state. During the
off-state, again neglecting the p-channel FET R DS-ON and
the inductor DCR,
require an unusually high output load current. In this
case, PSAVE re-entry may be of little concern. So if the
largest V IN exceeds approximately 90% of V OUT , instead
evaluate PSAVE entry at V IN = 0.9V OUT .
I L
off
1
L
T
DT
V IN V OUT dt
V IN V OUT
L
T
1 D
To ensure that I PSAVE-entry-max will be less than the PSAVE exit
current, evaluate the PSAVE-PWM mode transistions while
Note that this is a negative quantity, since V OUT > V IN and
0 < D < 1. For a constant load in steady-state, the inductor
current must satisfy Δ I L-on + Δ I L-off = 0. Substituting the two
expressions and solving for D, obtain D = 1 – V IN /V OUT .
Using this expression, and the positive valued expression
Δ I L = Δ I L-on for current ripple amplitude, obtain expanded
expression for I L-max and I L-min .
applying increasing and decreasing loads with V IN at and
above 2 / 3 V OUT . This should be done at the application’s
lowest specified ambient temperature as well as at room
temperature. If the PSAVE exit current is not suffi ciently
greater than the PSAVE entry current, the separation can
be enhanced by increasing the output capacitance to raise
I PSAVE-exit due to the 5μs off-time criterion (see Figure 3), or
by increasing the inductor value to reduce I PSAVE-entry .
I L
max,min
V OUT I OUT
V IN
T V IN
2 L V OUT
V OUT V IN
The inductor selection should also consider the n-channel
FET current limit for the expected range of input voltage
If the value of I OUT decreases until I L-min = 0, which is the
boundary of continuous and discontinuous PWM opera-
tion, the SC120 will transition from PWM operation to
PSAVE operation. Define this value of I OUT as I PSAVE-entry .
Setting the expression for I L-min to 0 and solving,
and output load current. The largest I L-avg will occur at the
expected smallest V IN and largest I OUT . Determine the
largest allowable Δ I L , based on the largest expected I L-avg ,
the minimum n-channel FET current limit, and the
inductor tolerance. Ensure that in the worst case,
I L-avg + Δ I L /2 < I LIM(N) .
I PSAVE
entry
T V IN
2 L V OUT
2
V OUT V IN
These calculations include the parameter η , efficiency.
Effi ciency varies with V IN , I OUT , and temperature. Estimate η
using the plots provided in this datasheet, or from experi-
The programmed value of V OUT is constant. I PSAVE-entry is a
polynomial function of V IN . Equating dI PSAVE-entry /dV IN = 0
and solving for V IN reveals that there is one non-zero extre-
mum of this function, a maximum, at V IN = 2 / 3 V OUT .*
Applying this value of V IN ,
mental data, at the operating condition of interest when
computing the effect of a new inductor value on PSAVE
entry and I-limit margin.
Any chosen inductor should have low DCR, compared to
the R DS-ON of the FET switches, to maintain efficiency,
I PSAVE
entry max
L
T
2
27
V OUT
though for DCR << R DS-ON , further reduction in DCR will
provide diminishing benefit. The inductor I SAT value should
exceed the expected I L-max . The inductor self-resonant fre-
The value of the inductor determines the PSAVE entry
output load current for a given V IN . Evaluate I PSAVE-entry at the
* For simplicity, effi ciency ( η ) is represented as a constant. But effi cien-
cy, itself a function of V IN , decreases with decreasing V IN (and decreases
with increasing temperature). Therefore at a given temperature, the
input voltage that produces the maximum PSAVE entry load current
will be slightly greater than 2 / 3 of V OUT .
quency should exceed 5×f osc . Any inductor with these
properties should provide satisfactory performance.
L = 4.7μH should perform well for most applications. For
high V OUT , (4.0V to 5.0V), and relatively high V IN (3.3V and
above), L = 6.8μH, along with a larger output capacitance
or larger-package output capacitor (for better V-bias per-
25
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