参数资料
| 型号： | SC16IS741IPW,112 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 15/17页 |
| 文件大小： | 0K |
| 描述： | IC UART 16TSSOP |
| 标准包装： | 96 |
| 特点： | RS-485 |
| 通道数： | 1，UART |
| FIFO's： | 64 字节 |
| 规程： | RS232，RS485 |
| 电源电压： | 2.5V, 3.3V |
| 带自动流量控制功能： | 是 |
| 带IrDA 编码器/解码器： | 是 |
| 带调制解调器控制功能： | 是 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 16-TSSOP |
| 包装： | 管件 |
| 其它名称： | 568-5784 SC16IS741IPW,112-ND |
SC16IS741_1
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 29 April 2010
7 of 52
NXP Semiconductors
SC16IS741
Single UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
7.2.1 Auto RTS
Figure 5 shows RTS functional timing. The receiver FIFO trigger levels used in auto RTS
are stored in the TCR or FCR. RTS is active if the RX FIFO level is below the halt trigger
level in TCR[3:0]. When the receiver FIFO halt trigger level is reached, RTS is deasserted.
The sending device (for example, another UART) may send an additional character after
the trigger level is reached (assuming the sending UART has another character to send)
because it may not recognize the deassertion of RTS until it has begun sending the
additional character. RTS is automatically reasserted once the receiver FIFO reaches the
resume trigger level programmed via TCR[7:4]. This re-assertion allows the sending
device to resume transmission.
7.2.2 Auto CTS
Figure 6 shows CTS functional timing. The transmitter circuitry checks CTS before
sending the next data byte. When CTS is active, the transmitter sends the next byte. To
stop the transmitter from sending the following byte, CTS must be deasserted before the
middle of the last stop bit that is currently being sent. The auto CTS function reduces
interrupts to the host system. When flow control is enabled, CTS level changes do not
trigger host interrupts because the device automatically controls its own transmitter.
Without auto CTS, the transmitter sends any data present in the transmit FIFO and a
receiver overrun error may result.
(1) N = receiver FIFO trigger level.
(2) The two blocks in dashed lines cover the case where an additional character is sent, as described in Section 7.2.1
Fig 5.
RTS functional timing
start
character
N
start
character
N + 1
start
stop
RX
RTS
receive
FIFO
read
N
N + 1
12
002aab040
(1) When CTS is LOW, the transmitter keeps sending serial data out.
(2) When CTS goes HIGH before the middle of the last stop bit of the current character, the transmitter finishes sending the current
character, but it does not send the next character.
(3) When CTS goes from HIGH to LOW, the transmitter begins sending data again.
Fig 6.
CTS functional timing
start
bit 0 to bit 7
stop
TX
CTS
002aab041
start
stop
bit 0 to bit 7
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| SC16IS750IBS | 功能描述:UART 接口集成电路 I2C/SPI-UARTBRIDGE W/IRDA AND GPIO RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
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