参数资料
型号: SC185HULTRT
厂商: Semtech
文件页数: 16/18页
文件大小: 0K
描述: IC REG BUCK SYNC 1.5V 4A 16MLPQ
标准包装: 1
类型: 降压(降压)
输出类型: 固定
输出数: 1
输出电压: 1.5V
输入电压: 2.9 V ~ 5.5 V
PWM 型: 电压模式
频率 - 开关: 1.5MHz
电流 - 输出: 4A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-UFQFN 裸露焊盘
包装: 标准包装
供应商设备封装: 16-MLPQ-UT(3x3)
其它名称: SC185HULDKR
SC185
Applications Information (continued)
PCB Layout Considerations
The layout diagram in Figure 2 shows a recommended
top-layer PCB for the SC185 and supporting components.
Figure 3 shows the bottom layer for this PCB. Fundamental
layout rules must be followed since the layout is critical
for achieving the performance specified in the Electrical
Characteristics table. Poor layout can degrade the
performance of the DC-DC converter and can contribute
to EMI problems, ground bounce, and resistive voltage
losses. Poor regulation and instability can result.
VIN
U1
L
VOUT
The following guidelines are recommended when
developing a PCB layout:
1. The input capacitor, C IN should be placed as close to
the PVIN and PGND pins as possible. This capacitor
provides a low impedance loop for the pulsed currents
GND
R 1
C 1
C SS
GND
present at the buck converter ’s input. Use short wide
traces to connect as closely to the IC as possible.
This will minimize EMI and input voltage ripple by
localizing the high frequency current pulses.
2. Keep the LX pin traces as short as possible to minimize
pickup of high frequency switching edges to other
parts of the circuit. C OUT and L should be connected as
close as possible between the LX and PGND pins, with
a direct return to the PGND pin from C OUT .
3. Route the output voltage feedback/sense path away
from the inductor and LX node to minimize noise and
Figure 2 — Recommended PCB Layout (Top Layer)
magnetic interference.
4. Use a ground plane referenced to the SC185 PGND
pin. Use several vias to connect to the component
VIN
GND
VOUT
side ground to further reduce noise and interference
on sensitive circuit nodes.
5. If possible, minimize the resistance from the VOUT
and PGND pins to the load. This will reduce the
voltage drop on the ground plane and improve the
GND
load regulation. And it will also improve the overall
efficiency by reducing the copper losses on the output
and ground planes.
Figure 3 — Bottom Layer Detail
? 2010 Semtech Corp.
16
www.semtech.com
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