参数资料
型号: SC28L92A1B,557
厂商: NXP Semiconductors
文件页数: 11/73页
文件大小: 0K
描述: IC UART DUAL W/FIFO 44-PQFP
产品培训模块: Stand-Alone UARTs
标准包装: 480
系列: IMPACT
特点: 故障启动位检测
通道数: 2,DUART
FIFO's: 16 字节
电源电压: 3.3V,5V
带自动流量控制功能:
带故障启动位检测功能:
带调制解调器控制功能:
带CMOS:
安装类型: 表面贴装
封装/外壳: 44-QFP
供应商设备封装: 44-PQFP(10x10)
包装: 托盘
产品目录页面: 828 (CN2011-ZH PDF)
其它名称: 568-1211
935263294557
SC28L92A1B
19
2552K–AVR–04/11
ATmega329/3290/649/6490
7.2
SRAM Data Memory
Figure 7-2 shows how the ATmega329/3290/649/6490 SRAM Memory is organized.
The ATmega329/3290/649/6490 is a complex microcontroller with more peripheral units than
can be supported within the 64 locations reserved in the Opcode for the IN and OUT instruc-
tions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and
LD/LDS/LDD instructions can be used.
The lower 2304/4352 data memory locations address both the Register File, the I/O memory,
Extended I/O memory, and the internal data SRAM. The first 32 locations address the Register
File, the next 64 location the standard I/O memory, then 160 locations of Extended I/O memory,
and the next 2048/4096 locations address the internal data SRAM.
The five different addressing modes for the data memory cover: Direct, Indirect with Displace-
ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register
File, registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base address given
by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-incre-
ment, the address registers X, Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 I/O Registers, 160 Extended I/O Registers, and
the 2,048 bytes of internal data SRAM in the ATmega329/3290/649/6490 are all accessible
through all these addressing modes. The Register File is described in “General Purpose Regis-
Figure 7-2.
Data Memory Map
7.2.1
Data Memory Access Times
This section describes the general access timing concepts for internal memory access. The
internal data SRAM access is performed in two clk
CPU cycles as described in Figure 7-3.
32 Registers
64 I/O Registers
Internal SRAM
(2048 x 8)/
(4096 x 8)
0x0000 - 0x001F
0x0020 - 0x005F
0x08FF/0x10FF
0x0060 - 0x00FF
Data Memory
160 Ext I/O Reg.
0x0100
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SC28L92A1BS,528 功能描述:UART 接口集成电路 3V-5V 1CH UART RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel
SC28L92A1BS,551 功能描述:UART 接口集成电路 3V-5V 1CH UART RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel
SC28L92A1BS,557 功能描述:UART 接口集成电路 3V-5V 1CH UART RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel
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