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参数资料
| 型号： | SC3031B |
| 厂商： | RF MONOLITHICS INC |
| 元件分类： | XO, clock |
| 英文描述： | SAW OSCILLATOR, 390 MHz |
| 封装： | RUGGED, MINIATURE, COMPACT, SMC-8, 8 PIN |
| 文件页数： | 1/2页 |
| 文件大小： | 83K |
| 代理商： | SC3031B |
SC3031B
390.00MHz
Differential Sine-Wave Clock
RF Monolithics, Inc.
Phone: (972) 233-2903
Fax: (972) 387-8148
E-mail: info@rfm.com
Page 1 of 2
http://www.rfm.com
1998 by RF Monolithics, Inc. The stylized RFM logo and RFM are registered trademarks of RF Monolithics, Inc.
SC3031B-093098
Quartz SAW Frequency Stability
Fundamental Fixed Frequency
Very Low Jitter and Power Consumption
Rugged, Miniature, Surface-Mount Case
Low-Voltage Power Supply (3.3 VDC)
This digital clock is designed for use with high-speed CPUs and digitizers. Fundamen-
tal-mode oscillation is made possible by surface-acoustic-wave (SAW) technology. The
design results in low jitter, compact size, and low power consumption. Differential out-
puts provide a sine wave that is capable of driving 50
loads.
CAUTION: Electrostatic Sensitive Device. Observe precautions for handling.
Notes:
1.
Unless otherwise noted, all specifications include any combination of load VSWR, VCC, and TA. In addition, Q and Q are terminated into 50
loads
to ground. (See: Typical Test Circuit.)
2.
One or more of the following United States patents apply: 4,616,197; 4,670,681; 4,760,352.
3.
The design, manufacturing process, and specifications of this device are subject to change without notice.
4.
Only under the nominal conditions of 50
load impedance with VSWR ≤ 1.2 and nominal power supply voltage.
5.
Symmetry is defined as the pulse width (in percent of total period) measured at the 50% points of Q or Q. (See: Timing Definitions.)
6.
Jitter and other spurious outputs induced by externally generated electrical noise on VCC or mechanical vibration are not included. Dedicated exter-
nal voltage regulation and careful PCB layout are recommended for optimum performance.
7.
Applies to period jitter of Q and Q. Measurements are made with the Tektronix CSA803 signal analyzer with at least 1000 samples.
8.
Period jitter measured with a 200 mVP-P sine wave swept from 1 MHz to one-half of fO at the VCC power supply terminal.
9.
The outputs are enabled when Terminal 8 is at logic HIGH. Propagation delay is defined as the time from the 50% point on the rising edge of
ENABLE to the 90% point on the rising edge of the output amplitude or as the fall time from the 50% point to the 10% point.
(SEE: Timing Definitions.)
Electrical Characteristics
Characteristic
Sym
Notes
Minimum
Typical
Maximum
Units
Output Frequency
Absolute Frequency
fO
1, 2
389.922
390.078
MHz
Tolerance from 390.00 MHz
f
O
±200
ppm
Q
and Q Output
Voltage into 50
(VSWR ≤ 1.2)
VO
1, 3
0.60
1.1
VP-P
Operating Load VSWR
2:1
Symmetry
3, 4, 5
49
51
%
Harmonic Spurious
3, 4, 6
-30
dBc
Nonharmonic Spurious
-60
dBc
Q
and Q Period Jitter
No Noise on VCC
3, 4, 6, 7
15
30
psP-P
200 mVP-P from 1 MHz to fO on VCC
3, 4, 7, 8
35
psP-P
Output (Disabled)
Amplitude into 50
3, 9
75
mVP-P
Output DC Resistance (between Q & Q)
3
50
K
ENABLE (Terminal 14)
Input HIGH Voltage
VIH
3, 9
VCC-0.1
VCC
VCC+0.1
V
Input LOW Voltage
VIL
0.0
0.20
V
Input HIGH Current
IIH
3
5
mA
Input LOW Current
IIL
-1
mA
Propagation Delay
tPD
1
ms
DC Power Supply
Operating Voltage
VCC
1, 3
+3.13
+3.30
+3.47
VDC
Operating Current
ICC
20
40
mA
Operating Ambient Temperature
TA
1, 3
0
+70
°C
Lid Symbolization (YY = Year, WW = Week)
RFM SC3031B 390.00 MHz YYWW
SMC-8 Case
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