参数资料
| 型号： | SC4215HSETRT |
| 厂商： | Semtech |
| 文件页数： | 7/10页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ 2A 8-SOIC |
| 标准包装： | 1 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 可调至 0.5V |
| 输入电压： | 1.4 V ~ 6 V |
| 电压 - 压降（标准）： | 0.3V @ 2A |
| 稳压器数量： | 1 |
| 电流 - 输出： | 2A（最小值） |
| 电流 - 限制（最小）： | 2.1A |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm Width）裸露焊盘 |
| 供应商设备封装： | 8-SOIC-EP |
| 包装： | 标准包装 |
| 其它名称： | SC4215HSEDKR |
SC4215H
Applications Information (continued)
Introduction
The SC4215H is intended for applications where high
≤50kΩ). A suitable value for R2 can be chosen in the range
of 1kΩ to 50kΩ. R1 can then be calculated from.
current capability and very low dropout voltage are
required. It provides a very simple, low cost solution that
uses very little PCB real estate. Additional features include
an enable pin to allow for a very low power consumption
R 1 = R 2 ?
( V O ? V REF )
V REF
standby mode, and a fully adjustable output.
The SC4215H is especially recommended for applications
where VO>3.8V, for lower output voltage requirements
the SC4215A can be considered.
Component Selection
Input capacitor: A large bulk capacitance ≥ 10μF/A
(output load) should be closely placed to the input supply
pin of the SC4215H to ensure that Vin does not sag below
1.4V. Also a minimum of 4.7μF ceramic capacitor is recom-
mended to be placed directly next to the Vin pin. This
allows for the device being some distance from any bulk
capacitance on the rail. Additionally, input droop due to
load transients is reduced, improving load transient
response. Additional capacitance may be added if required
by the application.
Enable: Pulling this pin below 0.4V turns the regulator off,
reducing the quiescent current to a fraction of its operat-
ing value. A pull up resistor up to 400kOhms should be
connected from this pin to the VIN pin in applications
where supply voltages of Vin < 1.9V are required. For
applications with higher voltages than 1.9V, EN pin could
be left open or connected to VIN.
Thermal Considerations
The power dissipation in the SC4215H is given by:
P D ≈ I O x (V IN - V O )
The allowable power dissipation will be dependant on the
thermal impedance achieved in the application. The derat-
ing curve below is valid for the thermal impedance speci-
fied in the Thermal Information section on page 3.
Output capacitor: A minimum bulk capacitance of ≥
10μF/A (output load), along with a 0.1μF ceramic decou-
pling capacitor is recommended. Increasing the bulk
capacitance will improve the overall transient response.
The use of multiple lower value ceramic capacitors in par-
allel to achieve the desired bulk capacitance will not cause
stability issues. Although designed for use with ceramic
output capacitors, the SC4215H is extremely tolerant of
output capacitor ESR values and thus will also work com-
fortably with tantalum output capacitors.
Noise immunity: In very electrically noisy environments,
it is recommended that 0.1μF ceramic capacitors be placed
from IN to GND and OUT to GND as close to the device
pins as possible.
Internal voltage selection: By connecting the FB pin
directly to the VO pin, the output voltage will be regulated
to the 0.5V internal reference.
External voltage selection resistors: The use of 1%
resistors, and designing for a current flow ≥ 10μA is rec-
ommended to ensure a well regulated output (thus R2
7
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