
MC9S12XE-Family Reference Manual , Rev. 1.21
Freescale Semiconductor
689
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Chapter 19
Pulse-Width Modulator (S12PWM8B8CV1)
19.1
Introduction
The PWM denition is based on the HC12 PWM denitions. It contains the basic features from the HC11
with some of the enhancements incorporated on the HC12: center aligned output mode and four available
clock sources.The PWM module has eight channels with independent control of left and center aligned
outputs on each channel.
Each of the eight channels has a programmable period and duty cycle as well as a dedicated counter. A
exible clock select scheme allows a total of four different clock sources to be used with the counters. Each
of the modulators can create independent continuous waveforms with software-selectable duty rates from
0% to 100%. The PWM outputs can be programmed as left aligned outputs or center aligned outputs.
19.1.1
Features
The PWM block includes these distinctive features:
Eight independent PWM channels with programmable period and duty cycle
Dedicated counter for each PWM channel
Programmable PWM enable/disable for each channel
Software selection of PWM duty pulse polarity for each channel
Period and duty cycle are double buffered. Change takes effect when the end of the effective period
is reached (PWM counter reaches zero) or when the channel is disabled.
Programmable center or left aligned outputs on individual channels
Eight 8-bit channel or four 16-bit channel PWM resolution
Four clock sources (A, B, SA, and SB) provide for a wide range of frequencies
Programmable clock select logic
Emergency shutdown
Table 19-1. Revision History
Revision
Number
Revision Date
Sections
Affected
Description of Changes
V01.17
08-01-2004
- Added clarication of PWMIF operation in STOP and WAIT mode.
- Added notes on minimum pulse width of emergency shutdown signal.