
MC9S12XE-Family Reference Manual , Rev. 1.21
Freescale Semiconductor
525
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Chapter 14
Enhanced Capture Timer (ECT16B8CV3)
14.1
Introduction
The HCS12 enhanced capture timer module has the features of the HCS12 standard timer module
enhanced by additional features in order to enlarge the eld of applications, in particular for automotive
ABS applications.
This design specication describes the standard timer as well as the additional features.
The basic timer consists of a 16-bit, software-programmable counter driven by a prescaler. This timer can
be used for many purposes, including input waveform measurements while simultaneously generating an
output waveform. Pulse widths can vary from microseconds to many seconds.
A full access for the counter registers or the input capture/output compare registers will take place in one
clock cycle. Accessing high byte and low byte separately for all of these registers will not yield the same
result as accessing them in one word.
Table 14-1. Revision History
Revision
Number
Revision Date
Sections
Affected
Description of Changes
V03.02
03 Apr 2007
- Removed redundant memory map table, corrected MCCNT[9] to MCCNT[0]
in register summary sheet (5 of 6), Removed Memory Map table (since the
information is redundant) in register summary gure.
V03.03
14 Sep 2007
V03.04
08 May 2008
V03.05
09 Sep 2008
14.4.1.2/14-572 Fixed a typo and rened a statement pertaining to switch between I/O and
timer functionlality.
V03.06
05 Aug 2009
update register PACTL bit4 PEDGE PT7 to IC7
update register PAFLG bit0 PAIF PT7 to IC7,update bit1 PAOVF PT3 to IC3
update register ICSYS bit3 TFMOD PTx to ICx
update register PBFLG bit1 PBOVF PT1 to IC1
update IC Queue Mode description.
V03.07
26 Aug 2009
- Add description, ?a counter overow when TTOV[7] is set?, to be the
condition of channel 7 override event.
- Phrase the description of OC7M to make it more explicit