参数资料
型号: SCE5783
元件分类: 显示用LED
英文描述: 5X7 DOT MATRIX DISPLAY, GREEN, 4.57 mm
封装: PLASTIC, DIP-26
文件页数: 12/14页
文件大小: 856K
代理商: SCE5783
SCE5780
2006-01-23
7
Block Diagram
Operation of the SCE578X
The SCE578X display consists of two CMOS ICs containing con-
trol logic and drivers for eight 5 x 7 characters. The first IC controls
characters 0 through 3 and the second IC controls characters 4
through 7. These components are assembled in a compact plastic
package.
Individual LED dot addressability allows the user great freedom in
creating special characters or mini-icons.
The serial data interface provides a highly efficient interconnection
between the display and the mother board. The SCE578X requires
a minimum three input lines as compared to fourteen for an equiva-
lent eight character parallel input part.
The on-board CMOS IC is the electronic heart of the display. Each
IC accepts serially formatted data, which is stored in the internal
RAM. The IC accepts data based on the character address
selected. The first IC is selected when addressing characters 0
through 3, the second IC is selected when addressing characters 4
though 7, and both ICs are selected when the Control Word is
addressed.
Asynchronously the RAM is read by the character multiplexer at a
strobe rate that results in a flicker free display. The Block Diagram
shows the three functional areas of the IC. These include: the input
serial data register and control logic, a 140 bit two port RAM, and
an internal multiplexer/display driver. The second IC is identical
except characters 4 though 7 are driven.
The following explains how to format the serial data to be loaded
into the display. The user supplies a string of bit mapped decoded
characters. The contents of this string is shown in Figure Loading
Serial Character Data“ a
(page 8). Figure Loading Serial Charac-
ter Data“ b
(page 8) shows that each character consist of eight 8
bit words. The first word encodes the display character location and
the succeeding seven bytes are row data. The row data represents
the status (On, Off) of individual column LEDs. Figure Loading
Serial Character Data“ c
(page 8) shows that each 8 bit word is for-
matted to represent Character Address, or Column Data.
Figure Loading Serial Character Data“ d
(page 8) shows the
sequence for loading the bytes of data. Bringing the LOAD line low
enables the serial register to accept data. The shift action occurs
on the low to high transition of the serial data clock (SDCLK). The
least significant bit (D0) is loaded first. After eight clock pulses the
LOAD line is brought high. With this transition the OPCODE is
decoded. The decoded OPCODE directs D4–D0 to be latched in
the Character Address register, stored in the RAM as Column
data, or latched in the Control Word register. The control IC
requires a minimum 600 ns delay between successive byte loads.
As indicated in Figure Loading Serial Character Data“ a
a total of 512 bits of data are required to load all eight characters
into the display.
The Character Address Register selects the character address that
the row and column data will be written to. See Table Load Char-
acter Adress“
(page 9) for opcode and character addressing. After
loading the Character Address Register, the next seven bytes load
the column data, one row at a time, starting with row 0 (top row)
and ending with row 6 (bottom row). Each character address has a
7 x 5 bit User RAM formatted as seven rows, each containing five
IDBD5071
LOAD
SDATA
SD CLK
Register
Data
140 bit RAM
Read 7 x 20
Write 28 x 5
Y
Address
Decode
0
1
2
3
X Address Decode
3-bit Address
Register
6-bit Control
Word Register
Control Word Logic
Column
Digits
Drivers
0 to 3
Counter Chain
& Timing Logic
RESET
Oscillator
CLKSEL
CLK I/O
4 - 5 x 7
Characters
4 - 5 x 7
Characters
45
6
7
VDIM Controls
Display Multiplexer
& Driver
Row Decoder
MUX
Rate
The second IC has the same
IC 2 controls characters 4 to 7
Function diagram as IC 1
Serial
IC 1
IC 2
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