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| 型号： | SCG102A-DFC-A1P2 V1.0 |
| 厂商： | Connor-Winfield |
| 文件页数： | 2/8页 |
| 文件大小： | 0K |
| 描述： | IC OSC CLCK GEN 77.76MHZ OUT SMD |
| 标准包装： | 1 |
| 类型： | 时钟发生器，扇出配送 |
| PLL： | 是 |
| 输入： | HCMOS，LVCMOS |
| 输出： | LVPECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:2 |
| 差分 - 输入:输出： | 无/无 |
| 频率 - 最大： | 77.76MHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SMD 模块 |
| 包装： | 管件 |
| 其它名称： | CW639 SCG102A 77.76M SCG102A-77.76M SCG102A77.76M |
Data Sheet #: SG076
Page 2 of 8
Rev: 00
Date: 4/11/07
Copyright 2007 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
The SCG102A provides high precision phase lock loop
frequency translation for the telecommunication applications.
The SCG102A product generates LVPECL outputs from an
intrinsically low jitter, voltage controlled crystal oscillator.
SCG102A is well suited for use in line cards, service
termination cards and similar functions to provide reliable
reference, phase locked, synchronization for TDM, PDH, SONET
and SDH network equipment . The SCG102A provides a jitter
filtered, wander following output signal sychronized to a superior
Stratum or peer input reference signal.
The SCG102A includes a lock detect alarm output. The PLL
control voltage is brought out through a 470 k
restistor and can
be used to determine when the pull range limits are reached.The
Functional Block Diagram
Figure 1
Frequency
Divider
Loop
Filter
PECL
VCXO
Frequency
Divider
OUT
(Pin 9)
COut
(Pin 10)
CLKIN
(Pin 1)
Select A
(Pin 12)
Select B
(Pin 13)
LD
(Pin 3)
Enable/Disable
(Pin 8)
Monitor
(Pin 4)
Microprocessor
470 k
10 k
10 k
LVPECL outputs may be put into the tri-state high impedance
condition for external testing purposes by asserting a high signal
to the Enable/Disable pin.
The SCG102A is a 3.3 Volt component that will typically draw
75mA. The SCG102A is designed to be used in applications that
require temperature rating of -40°C - 85° C. The SCG102A
package typical dimensions are 1.0” x 0.80” x 0.285” (See fig. 2
for maximum dimensions).
Parts are assembled using high
temperature solder to withstand surface mount reflow process.
The SCG102A locks to any one of four pred-determined input
frequencies selected using the SELECT (A&B) lines (See Table
4). The output may be any single frequency from 77.76 MHz to
170 MHZ.
Absolute Maximum Rating
Table 1
Symbol
Parameter
Minimum
Nominal
Maximum
Units
Notes
Vcc
Power Supply Voltage
-0.3
5.5
Volts
VI
Input Voltage
-0.3
Vcc
Volts
Ts
Storage Temperature
-55
125
°C
General Description
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| SCG102A-DFC-A1P6 | 制造商:CONNOR-WINFIELD 制造商全称:Connor-Winfield Corporation 功能描述:Synchronous Clock Generators |
| SCG102A-DFC-A1P6 V1.0 | 功能描述:IC OSC CLK GEN 155.52MHZ OUT SMD RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:27 系列:Precision Edge® 类型:频率合成器 PLL:是 输入:PECL，晶体 输出:PECL 电路数:1 比率 - 输入:输出:1:1 差分 - 输入:输出:无/是 频率 - 最大:800MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 5.25 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC 包装:管件 |
| SCG102A-DFC-A2P6 | 制造商:CONNOR-WINFIELD 制造商全称:Connor-Winfield Corporation 功能描述:Synchronous Clock Generators |
| SCG102A-DFC-A3P6 | 制造商:CONNOR-WINFIELD 制造商全称:Connor-Winfield Corporation 功能描述:Synchronous Clock Generators |
| SCG102A-DFC-A4P6 | 制造商:CONNOR-WINFIELD 制造商全称:Connor-Winfield Corporation 功能描述:Synchronous Clock Generators |
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