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参数资料
| 型号： | SDC-19206-302 |
| 厂商： | DATA DEVICE CORP |
| 元件分类： | 位置变换器 |
| 英文描述： | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, DIP40 |
| 封装： | 1.140 X 2.020 INCH, 0.230 INCH HEIGHT, TDIP-40 |
| 文件页数： | 1/16页 |
| 文件大小： | 124K |
| 代理商： | SDC-19206-302 |
SDC-19204/6 MONOBRID SERIES
DESCRIPTION
The SDC-19204/6 Monobrid Series
converters are versatile state-of-the-
art synchro-to-digital converters fea-
turing programmable resolution and
bandwidth, and velocity output volt-
age.
Resolution
programming
allows
selection of 10, 12, 14, or 16 bits and
is available with accuracies up to 2
minutes +1 LSB. Resolution program-
ming combines the high tracking rate
of a 10-bit converter with the preci-
sion of a 16-bit device in one pack-
age.
The velocity output (VEL) from the
SDC-19204/6 is a ground-based volt-
age of 0 to ±10 VDC with a linearity of
2.0%. VEL may be scaled by a single
external resistor to provide up to ±10
VDC for the required maximum track-
ing rate.
APPLICATIONS
The SDC-19204/6 Series converters
are designed for use in modern high-
performance commercial and indus-
trial control systems. Applications
include motor control, theodolite,
radar antenna position information,
CNC machine tooling, robot axis con-
trol, and process control. With their
low cost and superior performance,
the SDC-19204/6 Series converters
are ideal for motion control and posi-
tion monitoring systems.
10-, 12-, 14-, OR 16-BIT INDUSTRIAL
SYNCHRO-TO-DIGITAL CONVERTERS
FEATURES
Low Cost
Ideal for Motor Control
Built-In-Test (BIT) and
Loss-Of-Signal (LOS) Outputs
Velocity Output Eliminates
Tachometer
Programmable Resolution
Programmable Bandwidth
Accuracy to ±2.3 ARC Min.
CONVERTER
HIGH
ACCURACY
CONTROL
TRANSFORMER
GAIN
DEMODULATOR
ERROR
PROCESSOR
VCO
REFERENCE
CONDITIONER
16 BIT
UP/DOWN
COUNTER
1 LSB ANTIJITTER FEEDBACK
BW
U
T
E
VEL
BW
D
SIN
(
θ-φ)
e
SIN
θ
COS
θ
MC U
T
3 STATE
TTL BUFFER
3 STATE
TTL BUFFER
TTL
BUFFER
BIT
DETECT
INHIBIT
TRANSPARENT
LATCH
DIGITAL
INTERFACE
LOSS OF
SIGNAL
DETECTOR
16 BIT CT
TRANSPARENT
LATCH
16 BIT OUTPUT
TRANSPARENT
LATCH
EDGE
TRIGGERED
LATCH
DIGITAL
ANGLE
φ
Q
T
33
+5V
35
9
INH
5
29
BIT
40
REF
30
CB
31
U
32
MC
6
S
8
7
AB
11
EL
20-27
BITS 9-16
12-19
BITS 1-8
10
EM
28
LOS
+5V
OPTIONAL
INH
50 ns
DELAY
U/D
0.4 - 0.7
s
RESOLUTION
CONTROL
BW
DIFF
GAIN
OF 2
DIFF
GAIN
OF 2.2
+
-
10k
38
SIGNAL
INPUT
+15
37
39
36
1-3
SYNCHRO
INPUT
e
VEL
PROG
VEL
-15 V
ANALOG
CONDITIONER
POWER
SUPPLY
CONDITIONER
+11 V
V
INTERNAL
DC REF
(+5.5 V)
+15
34
-15 V
SDC-19204/6 BLOCK DIAGRAM
1988, 1999 Data Device Corporation
Monobrid is a registered trademark of Data Device Corporation.
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