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参数资料
| 型号： | SDCFAA-002G |
| 厂商： | SANDISK CORP |
| 元件分类： | 存储控制器/管理单元 |
| 英文描述： | IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, XMA50 |
| 封装： | PC CARD-50 |
| 文件页数： | 11/47页 |
| 文件大小： | 397K |
| 代理商： | SDCFAA-002G |
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SanDisk CompactFlash Card OEM Product Manual
Interface Description
02/09, Rev. 1.0 ii 2007 - 2009 SanDisk Corporation. SanDisk Confidential, subject to all applicable non-disclosure agreements.
19
Signal Name
Dir.
Pin
Description
READY
(PC Card Memory Mode)
O
37
In Memory Mode, this signal is set high
when the CompactFlash Storage Card or
CF+ Card is ready to accept a new data
transfer operation and is held low when
the card is busy.
At power up and at Reset, the READY
signal is held low (busy) until the
CompactFlash Storage Card or CF+ Card
has completed its power up or reset
function. No access of any type should be
made to the CompactFlash Storage Card
or CF+ Card during this time.
Note, however, that when a card is
powered up and used with RESET
continuously disconnected or asserted,
the Reset function of the RESET pin is
disabled. Consequently, the continuous
assertion of RESET from the application
of power shall not cause the READY
signal to remain continuously in the busy
state.
-IREQ
(PC Card I/O Mode)
I/O Operation – After the CompactFlash
Storage Card or CF+ Card has been
configured for I/O operation, this signal is
used as -Interrupt Request. This line is
strobed low to generate a pulse mode
interrupt or held low for a level mode
interrupt.
INTRQ
(True IDE Mode)
In True IDE Mode signal is the active high
Interrupt Request to the host.
-REG
(PC Card Memory Mode –
Except Ultra DMA
Protocol Active)
Attribute Memory Select
I
44
This signal is used during Memory Cycles
to distinguish between Common Memory
and Register (Attribute) Memory
accesses. High for Common Memory, Low
for Attribute Memory.
In PC Card Memory Mode, when Ultra
DMA Protocol is supported by the host
and the host has enabled Ultra DMA
protocol on the card the, host shall keep
the -REG signal
negated during the execution of any DMA
Command by the device.
-REG
(PC Card I/O Mode –
Except Ultra DMA
Protocol Active)
The signal shall also be active (low) during
I/O Cycles when the I/O address is on the
Bus.
In PC Card I/O Mode, when Ultra DMA
Protocol is supported by the host and the
host has enabled Ultra DMA protocol on
the card the, host shall keep the -REG
signal asserted during the execution of
any DMA Command by the device.
-DMACK
(PC Card Memory Mode
when Ultra DMA Protocol
Active)
DMACK
(PC Card I/O Mode when
Ultra DMA Protocol
Active)
-DMACK
(True IDE Mode)
This is a DMA Acknowledge signal that is
asserted by the host in response to (-)
DMARQ to initiate DMA transfers.
In True IDE Mode, while DMA operations
are not active, the card shall ignore the (-)
DMACK signal, including a floating
condition.
If DMA operation is not supported by a
True IDE Mode only host, this signal
should be driven high or connected to
VCC by the host.
A host that does not support DMA mode
and implements both PC Card and True-
IDE modes of operation need not alter the
PC Card mode connections while in True-
IDE mode as long as this does not prevent
proper operation all modes.
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| SDCFB-16-101 | FLASH MEMORY DRIVE CONTROLLER, XMA50 |
| SDCF2B-300-101 | FLASH MEMORY DRIVE CONTROLLER, XMA |
| SDCFBI-48-101 | FLASH MEMORY DRIVE CONTROLLER, XMA50 |
| SDCFB-32-101 | FLASH MEMORY DRIVE CONTROLLER, XMA50 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SDCFAA-004G | 制造商:SanDisk Corporation 功能描述:Flash Card 4G-byte 3.3V/5V CompactFlash 50-Pin 制造商:SanDisk 功能描述:Flash Card 4G-byte 3.3V/5V CompactFlash 50-Pin |
| SDCFAA-004G-F | 制造商:SanDisk Corporation 功能描述:Flash Card 4G-Byte 3.3V/5V CompactFlash 50-Pin 制造商:SanDisk 功能描述:Flash Card 4G-Byte 3.3V/5V CompactFlash 50-Pin |
| SDCFAA-008G | 制造商:SanDisk Corporation 功能描述:Flash Card 8G-byte 3.3V/5V CompactFlash 50-Pin 制造商:SanDisk 功能描述:Flash Card 8G-byte 3.3V/5V CompactFlash 50-Pin |
| SDCFAA-016G | 制造商:SanDisk Corporation 功能描述:Flash Card 16G-byte 3.3V/5V CompactFlash 50-Pin |
| SDCFB16101 | 制造商:SAND 功能描述: |
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