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参数资料
| 型号： | SED1241D |
| 元件分类： | 显示控制器 |
| 英文描述： | 24 X 80 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC194 |
| 封装： | GOLD BUMP, DIE-194 |
| 文件页数： | 5/7页 |
| 文件大小： | 47K |
| 代理商： | SED1241D |
SED1240 Series
5
s DC CHARACTERISTICS
VSS = –3.6 V to –2.4 V and Ta = –30 to 85
°C unless otherwise specified.
Parameter
Symbol
Condition
Rating
Units Pin used
Min.
Typ.
Max.
Supply
Recommended
VSS
—–3.6
–3.0
–2.4
V
VSS
voltage (1)
operation
*1
Data holding
—–5.5
—–1.8
voltage
Supply
Recommended
VSS2
—–3.6
—–2.4
V
VSS2
voltage (2)
operation
*2, *9
Operation
—–5.5
—–1.8
enabled
Supply
Recommended
V5
—–16.0
—–5.0
V
V5
voltage (3)
operation
*2
Operation
V1, V2
—
0.6
× V5
—
VDD
VV1, V2
enabled
Operation
V3, V4
—
V5
—
0.4
× V5
VV3, V4
enabled
High-level input voltage
VIHC
—
0.2
× VSS
—
VDD
V*3
Low-level input voltage
VILC
—
VSS
—
0.8
× VSS
V*3
Input leakage current
ILI
VIN = VDD or VSS
–1.0
—
1.0
A*3
Liquid crystal driver
RON
Ta = 25
°CV5 = –7.0 V
—
20
4.0
k
COM, SEG
ON resistance
V = 0.1 V
*4
Static current consumption
IDDQ
——
0.1
5.0
AVDD
Dynamic current consumption
IDD
During
V5 = –6 V,
——
80
AVDD
display
unloaded
*5
In standby
Oscillation = On,
——
20
AVDD
mode
power = Off
*6
In sleep
Oscillation = On,
——
5
AVDD
mode
power = Off
During
fcyc = 200 kHz
——
500
AVDD
access
*7
Input pin capacity
CIN
Ta = 25
°C, f = 1 MHz
—
5.0
8.0
pF
*3
Frame frequency
fFR
Ta = 25
°C, VSS = –3.0 V
70
100
130
Hz
*10
External clock frequency
fCK
2-lines display (SED1242)
—
28.8
—
kHz
*10, *11
fCK
3-lines display (SED1241)
—
41.6
—
kHz
*10, *11
fCK
4-lines display (SED1240)
—
54.4
—
kHz
*10, *11
Minimum reset pulse width
tRW
—
10
——
s*8
Reset start time
tRES
—
50
——
ns
*8
Dynamic System
Input voltage
VSS2
Double boosting
–7.0
—–1.8
V
VSS2
Triple boosting
–6.0
—–1.8
Boosting output voltage
VOUT
Double boosting
–11.0
——
VVOUT
Triple boosting
–16.5
——
Voltage follower
V5
—–16.0
—–4.5
V
—
operating voltage
Reference voltage
VREG
Ta = 25
°C
–2.06
–2.0
–1.94
V
—
Built-in
power
supply
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