参数资料
型号: SED1278F0H
元件分类: 显示控制器
英文描述: 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP80
封装: 14 X 20 MM, 2.70 MM HEIGHT, PLASTIC, QFP-80
文件页数: 16/39页
文件大小: 207K
代理商: SED1278F0H
EPSON
9–23
SED1278
LCD INTERFACE
LCD Drive Voltages
The SED1278 generates segment and common drive
signals using the voltages supplied to pins V1, V2, V3, V4
and V5. The voltage levels at these pins depend on the
duty cycle of the display. The specifications of these
voltages.
The simplest way of producing these voltages is to use a
resistive dividing network.
Figures 3 and 4 show examples of networks for 1/8, or 1/
11, and 1/16 duty cycles respectively.
SED1278
R
C
CO
VR
VDD
V1
V2
V3
V4
V5
VSS
Figure 3 LCD Drive Voltage Network – 1/8 or 1/11 Duty Cycle
SED1278
R
C
CO
VR
VDD
V1
V2
V3
V4
V5
VSS
Figure 4 LCD Drive Voltage Network – 1/16 Duty Cycle
Notes: 1. V5 is set using a potentiometer and (VDD–VSS).
2. The power supply to the SED1278 should be bypassed with a capacitor, CO, of at least 0.1
F placed as
close to the chip as possible.
相关PDF资料
PDF描述
SED1278D 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC80
SED1278F 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP80
SED1278F0G 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP80
SED1278D0B 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC80
SED1278F0H 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP80
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