参数资料
型号: SG1577ASY
厂商: Fairchild Semiconductor
文件页数: 11/15页
文件大小: 0K
描述: IC REG CTRLR BST PWM VM 20-SOIC
标准包装: 1,000
PWM 型: 电压模式
输出数: 2
频率 - 最大: 372kHz
占空比: 95%
电源电压: 10 V ~ 15 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 105°C
封装/外壳: 20-SOIC(0.295",7.50mm 宽)
包装: 带卷 (TR)
Functional Description
The SG1577A is a dual-channel voltage-mode PWM
controller. It has two sets of synchronous MOSFET
driving circuits. The two channels are running 180-
degrees out of phase. The following descriptions
highlight the advantages of the SG1577A design.
Soft Start
An internal start-up current (35/15μA) flows out of
SS/EN pin to charge an external capacitor. During the
startup sequence, SG1577A isn’t enabled until the
SS/ENB pin is higher than 1.2V. From 1.2V to (1.2 + 1.6
x D ON / D ON_MAX ) V, the PWM duty cycle gradually
increases following the SS/ENB pin voltage to bring
compensation externally. Non-inverting inputs are
internally tied to a fixed 0.7V ± 1.5% reference voltage.
Oscillator Operation
The SG1577A has a frequency-programmable
oscillator. The oscillator is running at 61kHz when the
RT pin is floating. The oscillator frequency can be
adjusted from 61kHz up to 340kHz by an external
resistor R RT between RT pin and the ground. The
oscillator generates a sawtooth wave that has 90%
rising duty. Sawtooth wave voltage threshold is from
1.2V to 2.8V. The frequency of oscillator can be
programmed according to the following equation:
output rising. After (1.2 + 1.6 x D ON / D ON_MAX ) V, the
soft-start period ends and SS/ENB pin continually rises
to 4.8V. When input power is abnormal, the external
f OSC , RT(kHz) = 61kHz + 8522 / R RT (k ? )
(3)
capacitor on the SS pin is shorted to ground and the
chip is disabled.
Output Driver
The high-side gate drivers need an external
C SS1 × (1.4V - 1.2V) = 35 μ A × t 1 ; C SS1 × (1.2V + 1.6 ×
; t 1 + t 2 = t SS1
5
12
0.9
- 1.4V) = 15 μ A × t 2
bootstrapping circuit to provide the required boost
voltage. The highest gate driver’s output (15V is the
allowed) on high-side and low-side MOSFETs forces
C SS2 × (1.4V - 1.2V) = 35 μ A × t 1 ; C SS2 × (1.2V + 1.6 × 12 - 1.4V) = 15 μ A × t 2
; t 1 + t 2 = t SS2
3.3
0.9
(1)
external MOSFETs to have the lowest R DS(ON) , which
results in higher efficiency.
C SS1 × 1.2V = 35 μ A × t 3 ;
= t 4
C SS2 × 0.3V C SS2 × (1.2V - 0.3V)
15 μ A
35 μ A
temperature is over 150 C, the chip enters tri-state
(high-side driver is turned off). The hysteresis is 20 C.
+
; t 4 - t 3 = t time - shift
Over-Current Protection (OCP)
Over-current protection is implemented by sensing the
voltage drop across the drain and the source of external
high-side MOSFET. Over-current protection is triggered
when the voltage drop on external high-side MOSFET’s
R DS(ON) is greater than the programmable current limit
voltage threshold. 120μA flowing through an external
resistor between input voltage and the CLP pin sets the
threshold of current limit voltage. When over-current
condition is true, the system is protected against the
cycle-by-cycle current limit. A counter counts a series of
over-current peak values to eight cycles; the soft-start
capacitor is discharged by a 50μA current until the
voltage on SS pin reaches 1.2V. During the discharge
period, the high-side driver is turned off and the low-
side driver is turned on. Once the voltage on SS/ENB
pin is under 1.2V, the normal soft-start sequence is
initiated and the 35/15μA current charges the soft-start
capacitor again.
Over-Temperature Protection (OTP)
The device is over-temperature protected. When chip
o
o
Type II Compensation Design
(for Output Capacitors with High ESR)
SG1577A is a voltage-mode controller; the control loop
is a single voltage feedback path, including an error
amplifier and PWM comparator, as shown in Figure 23.
To achieve fast transient response and accurate output
regulation, an adequate compensator design is
necessary. A stable control loop has a 0dB gain
crossing with -20dB/decade slope and a phase margin
greater than 45°.
I L(OCP) = [(R SENSE x I OCSET + V OFFSET ) / R DS(ON) -
(V IN - V OUT ) x V OUT / (f OSC x L OUT x V IN x 2) ]
(2)
where V OFFSET ( ≒ 10mV) is the offset voltage
contributed by the internal OCP comparator.
Error Amplifier
The IN1 and IN2 pins are connected to the
corresponding internal error amplifier’s inverting input
and the outputs of the error amplifiers are connected to
the corresponding COMP1 and COMP2 pins. The
COMP1 and COMP2 pins are available for control-loop
? 2009 Fairchild Semiconductor Corporation
SG1577A ? Rev. 1.0.2
11
Figure 23. Closed Loop
www.fairchildsemi.com
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SG1577DY 功能描述:电压模式 PWM 控制器 DUAL-SYNCHRONUOS DC/DC CONTROLLER RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel
SG1577DZ 制造商:FAIRCHILD 制造商全称:Fairchild Semiconductor 功能描述:Dual Synchronous DC/DC Controller
SG1577SY 功能描述:DC/DC 开关控制器 Dual Sync DC/DC Controller RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK
SG1577SY_12 制造商:FAIRCHILD 制造商全称:Fairchild Semiconductor 功能描述:Dual Synchronous DC/DC Controller
SG1577SZ 功能描述:DC/DC 开关控制器 Dual Synchronous DC/DC Controller RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK