参数资料
型号: SG6901ASZ
厂商: Fairchild Semiconductor
文件页数: 5/19页
文件大小: 714K
描述: IC PFC CTLR AVERAGE CURR 20SOIC
标准包装: 1
模式: 平均电流
频率 - 开关: 65kHz
电流 - 启动: 10µA
电源电压: 12 V ~ 20 V
工作温度: -30°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-SOIC(0.295",7.50mm 宽)
供应商设备封装: 20-SOIC
包装: 标准包装
其它名称: SG6901ASZDKR
 
?2008 Fairchild Semiconductor Corporation
 
www.fairchildsemi.com
SG6901A " Rev. 1.0.2
5
Pin Definitions
Pin #    Name    Description
1
VRMS
Line voltage detection. The pin is used for PFC multiplier, RANGE control of PFC output 
voltage, and brownout protection. For brownout protection, the controller is disabled after a
delay time when the VRMS voltage drops below a threshold. 
2
RI
Reference setting. One resistor connected between RI and ground determines the switching 
frequency. The switching frequency is equal to [1560 / RI] KHz, where R
I
 is in K? For example,
if RI is equal to 24K? the switching frequency is 65KHz. 
3
OTP
Over-temperature protection. A constant current is output from this pin. An external NTC 
thermistor must be connected from this pin to ground. The impedance of the NTC thermistor
decreases whenever the temperature increases. Once the voltage of the OTP pin drops below
the OTP threshold, the SG6901A is disabled. 
4
IEA
PFC current amplifier output. The signal from this pin is compared with an internal sawtooth 
to determine the pulse width for PFC gate drive. 
5
IPFC
The inverting input of the PFC current amplifier. Proper external compensation circuits result 
in excellent input power factor via average-current-mode control.
6
IMP
The non-inverting input of the PFC current amplifier and the output of multiplier. Proper 
external compensation circuits results in excellent input power factor via average-current-mode
control. 
7
ISENSE    Current limit. A resistor from this pin to GND sets the current limit. 
8
FBPWM
The control input for voltage-loop feedback of PWM stage. It is internally pulled high 
through a 6.5k?resistance. Usually an external opto-coupler from secondary feedback circuit is
connected to this pin.
9
IPWM
The current-sense input for the flyback PWM. Via a current sense resistor, this pin provides 
the control input for peak-current-mode control and cycle-by-cycle current limiting.
10
AGND
Signal ground.
11
SS
Soft start. During startup, the SS pin charges an external capacitor with a 50?/SPAN>A (R
I
=24K?
constant current source. The voltage on FBPWM is clamped by SS during startup. In the event
of a protection condition occurring and/or PWM being disabled, the SS pin is quickly
discharged.
12
OPWM
The totem-pole output drive for the flyback PWM MOSFET. This pin is internally clamped under
17V to protect the MOSFET.
13
GND
Power ground.
14
OPFC
The totem-pole output drive for the PFC MOSFET. This pin is internally clamped under 17V 
to protect the MOSFET.
15
VDD
The power supply pin.
16
RANGE
The RANGE pin has high impedance whenever the V
RMS
 voltage is lower than a threshold.
The PFC output voltage at low line can be reduced to improve efficiency.
17
OVP
The PFC stage over-voltage input. The comparator disables the PFC output driver if the 
voltage at this input exceeds a threshold. This pin can be connected to FBPFC or it can be
connected to the PFC boost output through a divider network.
18
FBPFC
The feedback input for PFC voltage loop. The inverting input of PFC error amplifier. This pin 
is connected to the PFC output through a divider network.
19
VEA
The error amplifier output for PFC voltage feedback loop. A compensation network (usually 
a capacitor) is connected between this pin and ground. A large capacitor value results in a
narrow bandwidth and improves the power factor.
20
IAC
This input is used to provide current reference for the multiplier. 
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