- 您现在的位置：买卖IC网 > PDF目录8999 > SI4122-D-GT (Silicon Laboratories Inc)IC SYNTHESIZER RF2/IF 24TSSOP PDF资料下载
参数资料
| 型号： | SI4122-D-GT |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 9/36页 |
| 文件大小： | 0K |
| 描述： | IC SYNTHESIZER RF2/IF 24TSSOP |
| 标准包装： | 62 |
| 类型： | 频率合成器 |
| PLL： | 是 |
| 输入： | 时钟 |
| 输出： | 时钟 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:2 |
| 差分 - 输入:输出： | 无/无 |
| 频率 - 最大： | 1.5GHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 2.7 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 24-TSSOP |
| 包装： | 管件 |
| 其它名称： | 336-1173 |
第1页第2页第3页第4页第5页第6页第7页第8页当前第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页
Si4133
Rev. 1.61
17
Figure 15. External Inductance Connection
As a design example, consider that the goal is to
synthesize frequencies in a 25 MHz band between
1120 and 1145 MHz using the Si4133-GT. The center
frequency should be defined as midway between the
two extremes, or 1132.5 MHz. The PLL can adjust the
VCO output frequency ±5% of the center frequency, or
±56.6 MHz of 1132.5 MHz (i.e., from approximately
1076 to 1189 MHz). The RF2 VCO has a CNOM of
4.8 pF. A 4.1 nH inductance in parallel with this
capacitance yields the required center frequency. An
external inductance of 1.8 nH should be connected
between RFLC and RFLD as shown in Figure 15. This,
in addition to 2.3 nH of package inductance, presents
the
correct
total
inductance
to
the
VCO.
In
manufacturing, the external inductance can vary ±10%
of its nominal value and the Si4133 corrects for the
variation with the self-tuning algorithm.
For more information on designing the external trace
inductors, refer to Application Note 31: Inductor Design
for the Si41xx Synthesizer Family.
3.3. Extended Frequency Operation
The Si4133 may operate at an extended frequency
range of 1850 MHz to 2050 MHz by connecting the
RFLA and RFLB pins directly. For information on
configuring
the
Si4133
for
extended
frequency
operation, refer to Application Note 41: Extended
Frequency Operation of Silicon Laboratories Frequency
Synthesizers.
3.4. Self-Tuning Algorithm
The self-tuning algorithm is initiated immediately after
powerup of a PLL or, if the PLL is already powered, after
a change in its programmed output frequency. This
algorithm attempts to tune the VCO so that its free-
running frequency is near the required output frequency.
In
doing
so,
the
algorithm
compensates
for
manufacturing tolerance errors in the value of the
external inductance connected to the VCO. It also
reduces the frequency error for which the PLL must
correct to get the precise required output frequency. The
self-tuning algorithm leaves the VCO oscillating at a
frequency in error by somewhat less than 1% of the
desired output frequency.
After self-tuning, the PLL controls the VCO oscillation
frequency. The PLL completes frequency locking,
eliminating any remaining frequency error. From then
on, it maintains frequency-lock, compensating for
effects of temperature and supply voltage variations.
The Si4133’s self-tuning algorithm compensates for
component value errors at any temperature within the
specified temperature range. However, the ability of the
PLL to compensate for drift in component values that
occur
after
self-tuning
is
limited.
For
external
inductances
with
temperature
coefficients
approximately ±150 ppm/oC, the PLL can maintain lock
for changes in temperature of approximately ±30 oC.
Applications where the PLL is regularly powered down
or the frequency is periodically reprogrammed minimize
or eliminate the potential effects of temperature drift
because the VCO is re-tuned in either case. In
applications where the ambient temperature can drift
substantially after self-tuning, it might be necessary to
monitor the lock-detect bar (LDETB) signal on the
AUXOUT pin to determine whether a PLL is about to
run out of locking capability. See “3.10. Auxiliary Output
Table 6. Si4133-GT VCO Characteristics
VCO fCEN Range
(MHz)
CNOM
(pF)
LPKG
(nH)
LEXT Range
(nH)
Min
Max
Min
Max
RF1
947
1720
4.3
2.0
0.0
4.6
RF2
789
1429
4.8
2.3
0.3
6.2
IF
526
952
6.5
2.1
2.2
12.0
Table 7. Si4133-GM VCO Characteristics
VCO fCEN Range
(MHz)
CNOM
(pF)
LPKG
(nH)
LEXT Range
(nH)
Min
Max
Min
Max
RF1
947
1720
4.3
1.5
0.5
5.1
RF2
789
1429
4.8
1.5
1.1
7.0
IF
526
952
6.5
1.6
2.7
12.5
L
PKG
2
L
PKG
2
L
EXT
相关PDF资料 |
PDF描述 |
|---|---|
| SI4113-D-GT | IC SYNTHESIZER RF1/RF2 24TSSOP |
| SI4122-D-GM | IC SYNTH RF2/IF SNGL-BAND 28MLP |
| SI4113-D-GM | IC SYNTHESIZER RF-ONLY 28MLP |
| VI-JTH-MZ-F3 | CONVERTER MOD DC/DC 52V 25W |
| VI-JTH-MZ-F1 | CONVERTER MOD DC/DC 52V 25W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SI4122-D-GTR | 功能描述:时钟发生器及支持产品 Single-Band RF Synthesizer RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| SI4122DY | 制造商:VISHAY 制造商全称:Vishay Siliconix 功能描述:N-Channel 40-V (D-S) MOSFET |
| SI4122DY-T1-GE3 | 功能描述:MOSFET 40V 27.2A 6.0W 4.5mohm @ 10V RoHS:否 制造商:STMicroelectronics 晶体管极性:N-Channel 汲极/源极击穿电压:650 V 闸/源击穿电压:25 V 漏极连续电流:130 A 电阻汲极/源极 RDS（导通）:0.014 Ohms 配置:Single 最大工作温度: 安装风格:Through Hole 封装 / 箱体:Max247 封装:Tube |
| SI4122-EVB | 功能描述:射频开发工具 Single-Band RF Synth (RF2/IF) Eval TSSOP RoHS:否 制造商:Taiyo Yuden 产品:Wireless Modules 类型:Wireless Audio 工具用于评估:WYSAAVDX7 频率: 工作电源电压:3.4 V to 5.5 V |
| SI4122G | 制造商:SILABS 制造商全称:SILABS 功能描述:DUAL-BAND RF SYNTHESIZER WITH INTEGRATED VCOS FOR GSM AND GPRS WIRELESS COMMUNICATIONS |
发布紧急采购，3分钟左右您将得到回复。