参数资料
型号: SI5367C-C-GQ
厂商: Silicon Laboratories Inc
文件页数: 22/80页
文件大小: 0K
描述: IC CLOCK MULTIPLIER PROG 100TQFP
标准包装: 90
系列: DSPLL®
类型: 时钟乘法器
PLL:
输入: 时钟
输出: CML,CMOS,LVDS,LVPECL
电路数: 1
比率 - 输入:输出: 4:5
差分 - 输入:输出: 是/是
频率 - 最大: 346MHz
除法器/乘法器: 无/是
电源电压: 1.71 V ~ 2.75 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 100-TQFP
供应商设备封装: 100-TQFP(14x14)
包装: 托盘
Si5367
Rev. 0.5
29
Reset value = 0000 0000
Register 10.
Bit
D7
D6
D5
D4
D3D2D1D0
Name
DSBL5_REG
DSBL4_REG DSBL3_REG DSBL2_REG DSBL1_REG
Type
RR
R/W
R
R/W
R
Bit
Name
Function
7:6
Reserved
5
DSBL5_REG DSBL5_REG.
This bit controls the powerdown and disable of the CKOUT5 output buffer. If disable
mode is selected, the NC5_LS output divider is also powered down.
0: CKOUT5 enabled.
1: CKOUT5 disabled.
4
Reserved
3
DSBL4_REG DSBL4_REG.
This bit controls the powerdown and disable of the CKOUT4 output buffer. If disable
mode is selected, the NC4 output divider is also powered down.
0 = CKOUT4 enabled
1 = CKOUT4 disabled
2
DSBL3_REG DSBL3_REG.
This bit controls the powerdown and disable of the CKOUT3 output buffer. If disable
mode is selected, the NC3 output divider is also powered down.
0: CKOUT3 enabled
1: CKOUT3 disabled
1
DSBL2_REG DSBL2_REG.
This bit controls the powerdown and disable of the CKOUT2 output buffer. If disable
mode is selected, the NC2 output divider is also powered down.
0: CKOUT2 enabled
1: CKOUT2 disabled
0
DSBL1_REG DSBL1_REG.
This bit controls the powerdown and disable of the CKOUT1 output buffer. If disable
mode is selected, the NC1 output divider is also powered down.
0: CKOUT1 enabled
1: CKOUT1 disabled
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