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| 型号： | SI5369-EVB |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 1/84页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR SI5369 CLK MULT |
| 标准包装： | 1 |
| 主要目的： | 计时，精密时钟 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | Si5369 |
| 已供物品： | 板，线缆，CD，文档 |
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Rev. 1.0 1/13
Copyright 2013 by Silicon Laboratories
Si5369
A NY-F REQUENCY P RECISION C LOCK M ULTIPLIER/J ITTER
A TTENUATOR
Features
Applications
Description
The Si5369 is a jitter-attenuating precision clock multiplier for applications
requiring sub 1 ps rms jitter performance. The Si5369 accepts four clock inputs
ranging from 2 kHz to 710 MHz and generates five clock outputs ranging from
2 kHz to 945 MHz and select frequencies to 1.4 GHz. The device provides
virtually any frequency translation combination across this operating range. The
outputs are divided down separately from a common source. The Si5369 input
clock frequency and clock multiplication ratio are programmable through an I2C or
SPI interface. The Si5369 is based on Silicon Laboratories' third-generation
DSPLL
technology,
which
provides
any-frequency
synthesis
and
jitter
attenuation in a highly integrated PLL solution that eliminates the need for
external VCXO and loop filter components. The DSPLL loop bandwidth is digitally
programmable, providing jitter performance optimization at the application level.
Operating from a single 1.8, 2.5 ,or 3.3 V supply, the Si5369 is ideal for providing
clock multiplication and jitter attenuation in high performance timing applications.
Generates any frequency from 2 kHz
to 945 MHz and select frequencies to
1.4 GHz from an input frequency of
2 kHz to 710 MHz
Ultra-low jitter clock outputs with jitter
generation as low as 300 fs rms
(12 kHz–20 MHz)
Integrated loop filter with selectable
loop bandwidth (4 Hz to 525 Hz)
Meets OC-192 GR-253-CORE jitter
specifications
Four clock inputs with manual or
automatically controlled hitless
switching and phase build-out
Supports holdover and freerun
modes of operation
SONET frame sync switching and
regeneration
Five clock outputs with selectable
signal format (LVPECL, LVDS, CML,
CMOS)
Support for ITU G.709 and custom
FEC ratios (253/226, 239/237,
255/238, 255/237, 255/236)
LOL, LOS, FOS alarm outputs
Digitally-controlled output phase
adjust
I2C or SPI programmable settings
On-chip voltage regulator for 1.8 V
±5%, 2.5 V ±10%, or 3.3 V ±10%
operation
Small size: 14 x 14 mm 100-pin
TQFP
Pb-free, RoHS compliant
SONET/SDH OC-48/STM-16/OC-
192/STM-64 line cards
GbE/10GbE, 1/2/4/8/10G FC line cards
ITU G.709 and custom FEC line cards
Wireless repeaters/wireless backhaul
Data converter clocking
OTN/WDM Muxponder, MSPP,
ROADM line cards
SONET/SDH + PDH clock
synthesis
Test and measurement
Synchronous Ethernet
Broadcast video
Ordering Information:
See page 78.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| Si5374B-A-BL | 功能描述:时钟合成器/抖动清除器 Quad DSPLL Jittr Clk Low loop BW 8In/Out RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| Si5374B-A-GL | 功能描述:时钟合成器/抖动清除器 QUAD DSPLL JITT ATT CLK LO LP BW 8IN/OUT RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| Si5374-EVB | 功能描述:时钟和定时器开发工具 QUAD DSPLL 8IN/8OUT CLOCK EVAL KIT RoHS:否 制造商:Texas Instruments 产品:Evaluation Modules 类型:Clock Conditioners 工具用于评估:LMK04100B 频率:122.8 MHz 工作电源电压:3.3 V |
| Si5375B-A-BL | 功能描述:时钟合成器/抖动清除器 Loop BW 60Hz-8.4 kHz 4In/Out 2kHz-808MHz RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| Si5375B-A-GL | 功能描述:时钟合成器/抖动清除器 QUAD DSPLL JITT ATT CLK ST LP BW 4IN/OUT RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
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