参数资料
型号: SI5369D-C-GQR
厂商: SILICON LABORATORIES
元件分类: 时钟产生/分配
英文描述: 243 MHz, PROC SPECIFIC CLOCK GENERATOR, PQFP100
封装: 14 X 14 MM, ROHS COMPLIANT, MS-026AED-HD, TQFP-100
文件页数: 73/84页
文件大小: 870K
代理商: SI5369D-C-GQR
Preliminary Rev. 0.4
75
49
LOL
O
LVCMOS
PLL Loss of Lock Indicator.
This pin functions as the active high PLL loss of lock indicator if
the LOL_PIN register bit is set to one.
0 = PLL locked.
1 = PLL unlocked.
If LOL_PIN = 0, this pin will tristate.
Active polarity is controlled by the LOL_POL bit. The PLL lock
status will always be reflected in the LOL_INT read only register
bit.
58
C1A
O
LVCMOS
CKIN1 Active Clock Indicator.
This pin serves as the CKIN1 active clock indicator. The
CK1_ACTV_REG
bit always reflects the active clock status for
CKIN1. If CK1_ACTV_PIN = 1, this status will also be reflected
on the C1A pin with active polarity controlled by the
CK_ACTV_POL
bit. If CK1_ACTV_PIN = 0, this output tristates.
59
C2A
O
LVCMOS
CKIN2 Active Clock Indicator.
This pin serves as the CKIN2 active clock indicator. The
CK2_ACTV_REG
bit always reflects the active clock status for
CKIN_2. If CK2_ACTV_PIN = 1, this status will also be reflected
on the C2A pin with active polarity controlled by the
CK_ACTV_POL
bit. If CK2_ACTV_PIN = 0, this output tristates.
60
SCL
I
LVCMOS
Serial Clock.
This pin functions as the serial port clock input for both SPI and
I2C modes.
This pin has a weak pull-down.
61
SDA_SDO
I/O
LVCMOS
Serial Data.
In I2C microprocessor control mode (CMODE = 0), this pin func-
tions as the bidirectional serial data port. In SPI microprocessor
control mode (CMODE = 1), this pin functions as the serial data
output.
68
69
A0
A1
ILVCMOS
Serial Port Address.
In I2C microprocessor control mode (CMODE = 0), these pins
function as hardware controlled address bits. The I2C address
is 1101 [A2] [A1] [A0]. In SPI microprocessor control mode
(CMODE = 1), these pins are ignored.
This pin has a weak pull-down.
70
A2_SS
ILVCMOS
Serial Port Address/Slave Select.
In I2C microprocessor control mode (CMODE = 0), this pin func-
tions as a hardware controlled address bit [A2].
In SPI microprocessor control mode (CMODE = 1), this pin
functions as the slave select input.
This pin has a weak pull-down.
71
SDI
I
LVCMOS
Serial Data In.
In SPI microprocessor control mode (CMODE = 1), this pin
functions as the serial data input.
In I2C microprocessor control mode (CMODE = 0), this pin is
ignored.
This pin has a weak pull-down.
Table 10. Si5369 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal Level
Description
Note:
Internal register names are indicated by underlined italics, e.g., INT_PIN. See Si5369 Register Map.
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