参数资料
型号: SI8220DD-A-IS
厂商: Silicon Laboratories Inc
文件页数: 5/32页
文件大小: 0K
描述: IC ISODRIVER 2.5A OPTO IN 16SOIC
标准包装: 46
输入 - 1 侧/2 侧: 1/0
通道数: 1
电源电压: 6.5 V ~ 24 V
电压 - 隔离: 5000Vrms
传输延迟: 40ns
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
供应商设备封装: 16-SOIC W
包装: 管件
工作温度: -40°C ~ 125°C
Si8220/21
Table 1. Electrical Characteristics (Continued) 1
V DD = 12 V or 15 V, V SS = GND, T A = –40 to +125 °C; typical specs at 25 °C.
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
I R = 10 mA.
Input Reverse Voltage
BV R
Measured at ANODE with
0.5
V
respect to CATHODE.
Input Capacitance
C IN
10
pF
VDD Undervoltage Threshold 2
VDD UV+
V DD rising
5 V Threshold
8 V Threshold
10 V Threshold
12.5 V Threshold
See Figure 9 on page 15.
See Figure 10 on page 15.
See Figure 11 on page 15.
See Figure 12 on page 15.
5.20
7.50
9.60
12.4
5.80
8.60
11.1
13.8
6.30
9.40
12.2
14.8
V
V
V
VDD Undervoltage Threshold 2
VDD UV–
V DD falling
5 V Threshold
8 V Threshold
10 V Threshold
12.5 V Threshold
See Figure 9 on page 15.
See Figure 10 on page 15.
See Figure 11 on page 15.
See Figure 12 on page 15.
4.90
7.20
9.40
11.6
5.52
8.10
10.1
12.8
6.0
8.70
10.9
13.8
V
V
V
VDD Lockout Hysteresis
VDD Lockout Hysteresis
VDD Lockout Hysteresis
VDD HYS
VDD HYS
VDD HYS
UVLO voltage = 5 V
UVLO voltage = 8 V
UVLO voltage = 10 V or
12.5 V
280
600
1000
mV
mV
mV
AC Specifications
Propagation Delay Time to High
Output Level
Propagation Delay Time to Low
Output Level
Output Rise and Fall Time
Device Startup Time
Common Mode
Transient Immunity
t PLH
t PHL
t R , t F
t START
CMTI
C L = 200 pF
C L = 200 pF
(0.5 A), C L = 200 pF
(2.5 A), C L = 200 pF
Time from
V DD = V DD_UV+ to V O
Input ON or OFF
V CM = 1500 V (see Figure 3)
30
60
40
30
20
40
ns
ns
ns
μs
kV/μs
Notes:
1. VDD = 12 V for 5, 8, and 10 V UVLO devices; VDD = 15 V for 12.5 V UVLO devices.
2. See "9.Ordering Guide" on page 22 for more information.
Rev. 1.4
5
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