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| 型号： | SI8402AB-B-IS |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 19/34页 |
| 文件大小： | 0K |
| 描述： | IC I2C ISOLATOR BIDIR 8-SOIC |
| 标准包装： | 96 |
| 输入 - 1 侧/2 侧： | 2/1 |
| 通道数： | 1 |
| 电源电压： | 3 V ~ 5.5 V |
| 电压 - 隔离： | 2500Vrms |
| 数据速率： | 10Mbps |
| 传输延迟： | 20ns |
| 输出类型： | 开路漏极 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 管件 |
| 工作温度： | -40°C ~ 125°C |
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Si840x
4.3. I 2 C Isolator Design Constraints
Table 13 lists the design constraints.
Table 13. Design Constraints
Design Constraint
To prevent the latch condition, the
isolator output low level must be
greater than the isolator input low
level.
Data Sheet Values
Isolator V OL 0.8 V typical
Isolator V IL 0.6 V typical
Input/Output Logic Low Level
Difference
Effect of Bus Pull-up Strength
and Temperature
This is normally guaranteed by the
isolator data sheet. However, if the
pull up strength is too weak, the out-
put low voltage will fall and can get
too close to the input low logic level.
? VSDA1, ? VSCL1 = 50 mV minimum These track over temperature.
If the pull up strength is too large,
The bus output low must be less
than the isolator input low logic
level.
The isolator output low must be
less than the bus input low.
Bus V OL = 0.4 V maximum
Isolator V IL = 0.45 V minimum
Bus V IL 0.3 x V DD = 1.0 V minimum for
V DD = 3.3 V
Isolator V OL = 0.825 V maximum,
(0.5 mA pullup, –10 to 125 °C)
the devices on the bus might not pull
the voltage below the input low
range. These have opposite tem-
perature coefficients. Worst case is
hot temperature.
If the pull up strength is too large,
the isolator might not pull below the
bus input low voltage.
Si8400/01/05 Vol: –1.8 mV/C
CMOS buffer: –0.6 mV/C
This provides some temperature
tracking, but worst case is cold tem-
perature.
4.4. I 2 C Isolator Design Considerations
The first step in applying an I 2 C isolator is to choose which side of the bus will be connected to the isolator A side.
Ideally, it should be the side which:
1. Is compatible with the range of bus pull up specified by the manufacturer. For example, the Si8400/01/02/05
isolators are normally used with a pull up of 0.5 mA to 3 mA.
2. Has the highest input low level for devices on the bus. Some devices may specify an input low of 0.9 V and
other devices might require an input low of 0.3 x Vdd. Assuming a 3.3 V minimum power supply, the side with
an input low of 0.3 x Vdd is the better side because this side has an input low level of 1.0 V.
3. Have devices on the bus that can pull down below the isolator input low level. For example, the Si840x input
level is 0.45 V. As most CMOS devices can pull to within 0.4 V of GND this is generally not an issue.
4. Has the lowest noise. Due to the special logic levels, noise margins can be as low as 50 mV.
The Si840x isolators are not compatible with devices that have a logic low of 0.8 V. For this situation, a discrete
circuit can be used. See “AN352: Low-Cost, High-Speed I 2 C Isolation with Digital Isolators” for additional
information.
Rev. 1.6
19
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SI8402AB-B-ISR | 制造商:Silicon Laboratories Inc 功能描述:2.5 KV BIDIRECTIONAL I2C ISOLATOR, UNI CLK, 1.7MHZ, SOIC8, L - Tape and Reel 制造商:Silicon Laboratories Inc 功能描述:IC I2C ISOLATOR BIDIR 8-SOIC 制造商:Silicon Laboratories Inc 功能描述:2.5 KV BIDIRECTIONAL I2C ISOLATOR 1.7MHz |
| SI8402DB | 制造商:VISHAY 制造商全称:Vishay Siliconix 功能描述:20-V N-Channel 1.8-V (G-S) MOSFET |
| SI8402DB_06 | 制造商:VISHAY 制造商全称:Vishay Siliconix 功能描述:20-V N-Channel 1.8-V (G-S) MOSFET |
| SI8402DB_08 | 制造商:VISHAY 制造商全称:Vishay Siliconix 功能描述:20-V N-Channel 1.8-V (G-S) MOSFET |
| SI8402DB-T1 | 制造商:VISHAY 制造商全称:Vishay Siliconix 功能描述:20-V N-Channel 1.8-V (G-S) MOSFET |
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