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| 型号： | SI8455BB-A-IS1 |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 26/36页 |
| 文件大小： | 0K |
| 描述： | IC ISOLATOR DGTL 5CH 16SOIC |
| 视频文件： | Digital Isolation Overview Digital Isolators vs. Optocouplers |
| 标准包装： | 48 |
| 系列： | ISOpro |
| 输入 - 1 侧/2 侧： | 5/0 |
| 通道数： | 5 |
| 电源电压： | 2.7 V ~ 5.5 V |
| 电压 - 隔离： | 2500Vrms |
| 数据速率： | 150Mbps |
| 传输延迟： | 6ns |
| 输出类型： | 三态 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC N |
| 包装： | 管件 |
| 工作温度： | -40°C ~ 125°C |
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Si8450/51/52/55
3. Errata and Design Migration Guidelines
The following errata apply to Revision A devices only. See "6. Ordering Guide" on page 29 for more details. No
errata exist for Revision B devices.
3.1. Enable Pin Causes Outputs to Go Low (Revision A Only)
When using the enable pin (EN1, EN2) function on the 5-channel (Si8450/1/2) isolators, the corresponding output
pin states (pin = An, Bn, where n can be 1…5) are driven to a logic low (to ground) when the enable pin is disabled
(EN1 or EN2 = 0). This functionality is different from the legacy 3-channel (Si8430/1) and 4-channel (Si8440/1/2)
isolators. On those devices, the isolator outputs go into a high-impedance state (Hi-Z) when the enable pin is
disabled (EN1 = 0 or EN2 = 0).
3.1.1. Resolution
The enable pin functionality causing the outputs to go low is supported in production for Revision A of the Si845x
devices. Revision B corrects the enable pin functionality (i.e., the outputs will go into the high-impedance state to
match the legacy isolator products). Refer to the Ordering Guide sections of the data sheet(s) for more information.
3.2. Power Supply Bypass Capacitors (Revision A and Revision B)
When using the Si845x isolators with power supplies > 4.5 V, sufficient VDD bypass capacitors must be present on
both the VDD1 and VDD2 pins to ensure the VDD rise time is less than 0.5 V/μs (which is > 9 μs for a > 4.5 V
supply). Although rise time is power supply dependent, > 1 μF capacitors are required on both power supply pins
(VDD1, VDD2) of the isolator device.
3.2.1. Resolution
For recommendations on resolving this issue, see "2.4.1. Supply Bypass" on page 22. Additionally, refer to "6.
Ordering Guide" on page 29 for current ordering information.
3.3. Latch Up Immunity (Revision A Only)
Latch up immunity generally exceeds ± 200 mA per pin. Exceptions: Certain pins provide < 100 mA of latch-up
immunity. To increase latch-up immunity on these pins, 100 ? of equivalent resistance must be included in series
with all of the pins listed in Table 14. The 100 ? equivalent resistance can be comprised of the source driver's
output resistance and a series termination resistor.
3.3.1. Resolution
This issue has been corrected with Revision B of the device. Refer to the Ordering Guide for more information.
Table 14. Affected Ordering Part Numbers (Revision A Only)
Affected Ordering Part Numbers*
SI8450SV-A-IS/IS1, SI8451SV-A-IS/IS1,
SI8452SV-A-IS/IS1
SI8455SV-A-IS/IS1
Device
Revision
A
A
Pin#
2
6
10
14
2
6
14
Name
A1
A5
EN2
B2
A1
A5
B2
Pin Type
Input
Input or Output
Input
Output
Input
Input
Output
*Note: SV = Speed Grade/Isolation Rating (AA, AB, BA, BB).
26
Rev. 1.5
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相关代理商/技术参数 |
参数描述 |
|---|---|
| Si8455BB-A-IS1R | 功能描述:隔离器接口集成电路 5 Ch 2.5kV Isolator 150M 5/0 RoHS:否 制造商:Texas Instruments 通道数量:2 传播延迟时间: 电源电压-最大:5.5 V 电源电压-最小:3 V 电源电流:3.6 mA 功率耗散: 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:SOIC-8 封装:Tube |
| Si8455BB-B-IS | 功能描述:隔离器接口集成电路 5-Ch 2.5kV Isolator 150M 5/0 RoHS:否 制造商:Texas Instruments 通道数量:2 传播延迟时间: 电源电压-最大:5.5 V 电源电压-最小:3 V 电源电流:3.6 mA 功率耗散: 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:SOIC-8 封装:Tube |
| Si8455BB-B-IS1 | 功能描述:隔离器接口集成电路 5 Ch 2.5kV Isolator 150M 5/0 RoHS:否 制造商:Texas Instruments 通道数量:2 传播延迟时间: 电源电压-最大:5.5 V 电源电压-最小:3 V 电源电流:3.6 mA 功率耗散: 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:SOIC-8 封装:Tube |
| SI8455BB-B-IS1R | 功能描述:隔离器接口集成电路 5 Ch 2.5kV Isolator 150M 5/0 RoHS:否 制造商:Texas Instruments 通道数量:2 传播延迟时间: 电源电压-最大:5.5 V 电源电压-最小:3 V 电源电流:3.6 mA 功率耗散: 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:SOIC-8 封装:Tube |
| SI84-560 | 制造商:DELTA 制造商全称:Delta Electronics, Inc. 功能描述:SMT Power Inductor |
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