参数资料
型号: SI8519-C-IM
厂商: Silicon Laboratories Inc
文件页数: 15/36页
文件大小: 0K
描述: SENSOR CURR 20A 5.5V UNI 12QFN
标准包装: 490
电流 - 感应: 20A
精确度: ±5%
灵敏度: 98mV/A
电流 - 电源: 4mA
传感器类型: 闭环
电源电压: 2.7 V ~ 5.5 V
输出: 可配置
频率: 50kHz ~ 1MHz
电极标记: 单向
工作温度: -40°C ~ 125°C
封装/外壳: 12-VFQFN
包装: 管件
产品目录页面: 627 (CN2011-ZH PDF)
其它名称: 336-1732-5
Si85xx
3.3.2. Selecting Reset Timing Signals
Reset timing signals should be chosen to meet the
following conditions:
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?
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Satisfy reset time t R
Not overlap integrator reset into the desired
measurement period
Not violate reset watchdog timeout period t WD
3.3.3. Configuring Integrator Reset
Per Section “2. Functional Overview”, the integrator
must be reset (zeroed) prior to the start of each
measurement cycle to achieve specified measurement
accuracy. This reset must be synchronized with the
system switch timing signals to ensure that current is
measured during the appropriate time; so, the Si85xx
integrator reset circuitry uses system timing as its
reference. Timing signals connect to reset inputs R1
through R4 where built-in logic functions allow the user
to choose the conditions that cause an integrator reset
event. Important Note: reset inputs R1–R4 are rated to
a maximum input voltage of VDD. External resistor
dividers must be used when connecting driver output
signals to R1–R4 that swing beyond VDD.
As shown in Table 11, the Si850x integrator reset logic
is a simple XOR gate where reset is maintained (or
triggered, depending on use of the TRST input) when
states of reset inputs R1 and R2 are not equal.
Figure 14 shows the logic for the Si851x products,
where any one of three reset logic functions can cause
integrator reset. The output mode (Si851x) is
determined by the states of the Mode and R4 inputs, as
shown in Table 11.
Preliminary Rev. 0.4
15
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