参数资料
型号: SI9108DN02-T1-E3
厂商: Vishay Siliconix
文件页数: 6/11页
文件大小: 0K
描述: IC REG FLYBK ISOLATED 4V 20PLCC
标准包装: 1,000
类型: 回扫,隔离
输出类型: 固定
输出数: 1
输出电压: 4V
输入电压: 10 V ~ 120 V
PWM 型: 电流模式
频率 - 开关: 40kHz ~ 1MHz
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-LCC(J 形引线)
包装: 带卷 (TR)
供应商设备封装: 20-PLCC(9x9)
Si9108
Vishay Siliconix
DETAILED DESCRIPTION
Product is End of Life 3/2014
Pre-Regulator/Start-Up Section
Due to the low quiescent current requirement of the Si9108
control circuitry, bias power can be supplied from the unreg-
ulated input power source, from an external regulated low-
voltage supply, or from an auxiliary "bootstrap" winding on
the output inductor or transformer.
When power is first applied during start-up, + V IN will draw a
constant current. The magnitude of this current is determined
by a high-voltage depletion MOSFET device which is con-
nected between + V IN and V CC . This start-up circuitry pro-
vides initial power to the IC by charging an external bypass
capacitance connected to the V CC pin. The constant current
is disabled when V CC exceeds 9.3 V. If V CC is not forced to
exceed the 9.3 V threshold, then V CC will be regulated to a
nominal value of 9.3 V by the pre-regulator circuit.
As the supply voltage rises toward the normal operating con-
ditions, an internal undervoltage (UV) lockout circuit keeps
the output MOSFET disabled until V CC exceeds the under-
voltage lockout threshold (typically 8.7 V). This guarantees
that the control logic will be functioning properly and that suf-
ficient gate drive voltage is available before the MOSFET
turns on. The design of the IC is such that the undervoltage
lockout threshold will not exceed the pre-regulator turn-off
voltage. Power dissipation can be minimized by providing an
external power source to V CC such that the constant current
source is always disabled.
BIAS
To properly set the bias for the Si9108, a 820 k Ω resistor
should be tied from BIAS to - V IN . This determines the mag-
nitude of bias current in all of the analog sections and the
pull-up current for the SHUTDOWN and RESET pins. The
current flowing in the bias resistor is nominally 7.5 μA.
Reference Section
Error Amplifier
Closed-loop regulation is provided by the error amplifier,
whose 1 k Ω dynamic output impedance enables it to be used
with feedback compensation (unlike transconductance
amplifiers). A MOS differential input stage provides for low
input current. The noninverting input to the error amplifier
(V REF ) is internally connected to the output of the reference
supply and should be bypassed with a small capacitor to
ground.
Oscillator Section
The oscillator consists of a ring of CMOS inverters, capaci-
tors, and a capacitor discharge switch. Frequency is set by
an external resistor between the OSC IN and OSC OUT pins.
(See Typical Characteristics graph of resistor value vs. fre-
quency.) The DISCHARGE pin should be tied to -V IN for nor-
mal internal oscillator operation. For 98 % duty cycle, the
discharge pin must be connected to - V IN or can be con-
nected to - V IN through a resistor to set the dead time.
Remote synchronization can be accomplished by capacitive
coupling of a synchronization pulse into the OSC IN terminal.
For a 5 V pulse amplitude and 0.5 μs pulse width, typical val-
ues would be 100 pF in series with 3 k Ω to OSC IN.
SHUTDOWN and RESET
SHUTDOWN and RESET are intended for overriding the
output MOSFET switch via external control logic. The two
inputs are fed through a latch preceding the output switch.
Depending on the logic state of RESET, SHUTDOWN can
be either a latched or unlatched input. The output is off when-
ever SHUTDOWN is low. By simultaneously having SHUT-
DOWN and RESET low, the latch is set and SHUTDOWN
has no effect until RESET goes high. (See the table below.)
Table 1. Truth Table for the SHUTDOWN and RESET Pins
The reference section of the Si9108 consists of a tempera-
ture compensated buried zener and trimmable divider net-
work. The output of the reference section is connected
internally to the non-inverting input of the error amplifier.
Nominal reference output voltage is 4 V. The trimming proce-
dure that is used on the Si9108 brings the output of the error
amplifier (which is configured for unity gain during trimming)
SHUTDOWN
H
H
L
L
RESET
H
H
L
L
Output
Normal Operation
Normal Operation (No Change)
Off (Not Latched)
Off (Latched)
Off (Latched, No Change)
to within ± 1 % of 4 V. This automatically compensates for the
input offset voltage in the error amplifier.
The output impedance of the reference section has been
purposely made high so that a low impedance external volt-
age source can be used to override the internal voltage
source, if desired, without otherwise altering the perfor-
mance of the device.
www.vishay.com
6
When power is first applied during start-up, + V IN will draw a
constant current. The magnitude of this current is determined
by a high-voltage depletion MOSFET device which is con-
nected between + V IN and V CC . This start-up circuitry pro-
vides initial power to the IC by charging an external bypass
capacitance connected to the V CC pin. The constant current
is disabled when V CC exceeds 9.3 V. If V CC is not forced to
exceed the 9.3 V threshold, then V CC will be regulated to a
nominal value of 9.3 V by the pre-regulator circuit.
Document Number: 70883
S-42038-Rev. B, 15-Nov-04
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