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参数资料
| 型号： | SI9112DY-T1-E3 |
| 厂商： | Vishay Siliconix |
| 文件页数： | 5/10页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR FLYBK CUK CM 14SOIC |
| 标准包装： | 2,500 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 3MHz |
| 占空比： | 50% |
| 电源电压： | 9 V ~ 13.5 V |
| 降压： | 无 |
| 升压： | 无 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 是 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 14-SOIC（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
Si9112
Vishay Siliconix
PIN CONFIGURATIONS AND ORDERING INFORMATION
Dual-In-Line and SOIC
BIAS
+V IN
SENSE
OUTPUT
1
2
3
4
14 FB
13 COMP
12 RESET
11 SHUTDOWN
ORDERING INFORMATION
Part Number Temperature Range Package
Si9112DY
Si9112DY-T1 SOIC-14
Si9112DY-T1—E3 ? 40 to 85 _ C
? V IN
V CC
OSC OUT
5
6
7
10 V REF
9 DISCHARGE
OSC IN
8
Si9112DJ
Si9112DJ—E3
PDIP-14
Top View
DETAILED DESCRIPTION
Pre-Regulator/Start-Up Section
Due to the low quiescent current requirement of the Si9112
control circuitry, bias power can be supplied from the
unregulated input power source, from an external regulated
low-voltage supply, or from an auxiliary “bootstrap” winding on
the output inductor or transformer.
When power is first applied during start-up, +V IN (pin 2) will
draw a constant current. The magnitude of this current is
determined by a high-voltage depletion MOSFET device
which is connected between +V IN and V CC (pin 6). This
start-up circuitry provides initial power to the IC by charging an
external bypass capacitance connected to the V CC pin. The
charging current is disabled when V CC exceeds 8.7 V. If V CC is
not forced to exceed the 8.7-V threshold, then V CC will be
regulated to a nominal value of 8.7 V by the pre-regulator
circuit.
As the supply voltage rises toward the normal operating
conditions, an internal undervoltage (UV) lockout circuit keeps
the output driver disabled until V CC exceeds the UV lockout
threshold (typically 8.1 V). This guarantees that the control
logic will be functioning properly and that sufficient gate drive
voltage is available before the MOSFET turns on. The design
of the IC is such that the undervoltage lockout threshold will be
at least 300 mV less than the pre-regulator turn-off voltage.
Power dissipation can be minimized by providing an external
power source to V CC such that the pre-regulator circuit is
disabled.
BIAS
To properly set the bias for the Si9112, a 270-k W resistor
should be tied from BIAS (pin 1) to ? V IN (pin 5). This
sDocument Number: 70005
S-42036—Rev. H, 15-Nov-04
determines the magnitude of bias current in all of the analog
sections and the pull-up current for the SHUTDOWN and
RESET pins. The current flowing in the bias resistor is
nominally 15 m A.
Reference Section
The reference section of the Si9112 consists of a temperature
compensated buried zener and trimmable divider network.
The output of the reference section is connected internally to
the non-inverting input of the error amplifier. Nominal reference
output voltage is 4 V. The trimming procedure that is used on
the Si9112 brings the output of the error amplifier (which is
configured for unity gain during trimming) to within " 2% of 4 V.
This automatically compensates for input offset voltage in the
error amplifier.
The output impedance of the reference section has been
purposely made high so that a low impedance external voltage
source can be used to override the internal voltage source, if
desired, without otherwise altering the performance of the
device.
Error Amplifier
Closed-loop regulation is provided by the error amplifier. The
emitter follower output has a typical dynamic output
impedance of 1000 W , and is intended for use with
“around-the-amplifier” compensation. A MOS differential input
stage provides low input leakage current. The noninverting
input to the error amplifier (V REF ) is internally connected to the
output of the reference supply and should be bypassed with a
small capacitor to ground.
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