参数资料
型号: SI9120DJ-E3
厂商: Vishay Siliconix
文件页数: 3/10页
文件大小: 0K
描述: IC CTRLR UNIV SWMODE 16DIP
标准包装: 500
输出隔离: 隔离
频率范围: 40kHz ~ 1MHz
输入电压: 9.5 V ~ 13.5 V
输出电压: 4V
功率(瓦特): 750mW
工作温度: -40°C ~ 85°C
封装/外壳: 16-DIP(0.300",7.62mm)
供应商设备封装: 16-PDIP
包装: 散装
Si9120
Vishay Siliconix
SPECIFICATIONS a
Parameter
Symbol
Specific Test Conditions
DISCHARGE = ? V IN = 0 V,
V CC = 10 V +V IN = 300 V
R BIAS = 390 k W , R OSC = 330 k W
TEMP B
LIMITS
D Suffix ? 40 to 85 _ C
MIN C TYP D MAX C
Unit
Error Amplifier (Cont’d)
Dynamic Output Impedance e
Z OUT
Error Amp configured for 60 dB gain
Room
1000
2000
W
Output Current
Power Supply Rejection
I OUT
PSRR
Source V FB = 3.4 V
Sink V FB = 4.5 V
9.5 V v V CC v 13.5 V
Room
Room
Room
0.12
50
? 2.0
0.15
70
? 1.4
mA
dB
Current Limit
Threshold Voltage
V SOURCE
V FB = 0 V
Room
1.0
1.2
1.4
V
Delay to
Output e
t d
V SENSE = 1.5 V, See Figure 1
Room
100
150
ns
Pre-Regulator/Start-Up
Input Voltage
Input Leakage Current
+V IN
+I IN
I IN = 10 m A
V CC w 9.4 V
Room
Room
450
10
V
m A
V CC Pre-Regulator Turn-Off Threshold
Voltage
V REG
I PRE-REGULATOR = 10 m A
Room
7.8
8.6
9.4
Undervoltage Lockout
V REG ? V UVLO
V UVLO
V DELTA
Room
Room
7.0
0.3
8.1
0.6
8.9
V
Supply
Supply Current
I CC
C L = 500 pF at Pin 5
Room
0.85
1.5
mA
Bias Current
I BIAS
Room
10
15
20
m A
Logic
SHUTDOWN Delay e
SHUTDOWN Pulse Width e
RESET Pulse Width e
Latching Pulse Width
SHUTDOWN and RESET Low e
t SD
t SW
t RW
t LW
C L = 500 pF, V SENSE = ? V IN
See Figure 2
See Figure 3
Room
Room
Room
Room
50
50
25
50
100
ns
Input Low Voltage
Input High Voltage
V IL
V IH
Room
Room
8.0
2.0
V
Input Current Input Voltage High
Input Current Input Voltage Low
I IH
I IL
V IN = 10 V
V IN = 0 V
Room
Room
? 35
1
? 25
5
m A
Output
Output High Voltage
Output Low Voltage
Output Resistance
V OH
V OL
R OUT
I OUT = ? 10 mA
I OUT = 10 mA
I OUT = 10 mA, Source or Sink
Room
Full
Room
Full
Room
Full
9.7
9.5
20
25
0.3
0.5
30
50
V
W
Rise Time e
Fall Time e
t r
t f
C L = 500 pF
Room
Room
40
40
75
75
ns
Notes
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. Room = 25 _ C, Cold and Hot = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
a. 250 V v +V IN 380 V place a 10-k W , 1 / 4 -W resistor in series with a +V IN (Pin1).
380 V v +V IN 450 V place a 15-k W , 1 / 4 -W resistor in series with a +V IN (Pin1).
Connect a 0.01- m fd capacitor between +V IN (Pin 1) and ? V IN (Pin 6).
Document Number: 70006
S-42042—Rev. H, 15-Nov-04
www.vishay.com
3
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