参数资料
型号: SI9166BQ-T1-E3
厂商: Vishay Siliconix
文件页数: 7/11页
文件大小: 0K
描述: IC REG BUCK BST SYNC ADJ 16TSSOP
标准包装: 3,000
类型: 降压(降压),升压(升压)
输出类型: 可调式
输出数: 1
输出电压: 可调至 1.3V
输入电压: 2.7 V ~ 6 V
PWM 型: 电压模式
频率 - 开关: 200kHz ~ 2MHz
电流 - 输出: 1.5A
同步整流器:
工作温度: -25°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
包装: 带卷 (TR)
供应商设备封装: 16-TSSOP
Product is End of Life 3/2014
Si9166
Vishay Siliconix
MODE Selection
The Si9166 can be programmed to operate as Buck or Boost
converter. If the MODE pin is connected to AGND, it oper-
ates in buck mode. If the MODE pin is connected to V DD , it
operates in boost mode. The DH gate drive output is
designed to drive high-side P-Channel MOSFET, acting as
the main switch in buck topology and the synchronous recti-
fier in boost topology. The DL gate drive output is designed
to drive low-side N-Channel MOSFET, acting as the syn-
chronous rectifier in buck topology and the main switch in
boost topology.
The maximum duty cycle under boost mode is internally lim-
ited to 70 % to prevent inductor saturation. If the converter is
turned on for 100 % duty cycle, inductor never gets a chance
to discharge its energy and eventually saturate. In boost
mode, synchronous rectifier is always turned on for minimum
or greater duration as long as the switch has been turned on.
The controller will deliver 0 % duty cycle, if the input voltage
is greater than the programmed output voltage. Because of
signal propagation time and MOSFET delay/rise/fall time,
controller will not transition smoothly from minimum control-
lable duty cycle to 0 % duty cycle. For example, controller
may decrease its duty cycle from 5 % to 0 % abruptly, instead
of gradual decrease you see from 70 % to 5 %.
PWM Mode
Pulse Skipping Mode
With PWM/PSM mode pin in logic high condition, the Si9166
operates in constant frequency (PWM) mode. As the load
and line varies, switching frequency remain constant. The
switching frequency is programmed by the R OSC value. In
the PWM mode, the synchronous drive is always enabled,
even when the output current reaches 0 A. Therefore, the
converter always operates in continuous conduction mode
(CCM) if a synchronous switch is used. In CCM, transfer
function of the converter remains almost constant, providing
fast transient response. If the converter operates in discon-
tinuous conduction mode (DCM), overall loop gain
decreases and transient response time can be ten times lon-
ger than if the converter remain in continuous current mode.
This transient response time advantage can significantly
decrease the hold-up capacitors needed on the output of dc/
dc converter to meet the transient voltage regulation. The
PWM/PSM pin is available to dynamically program the con-
troller. If the synchronous rectifier switch is not used, the con-
verter will operate in DCM at light load.
The maximum duty cycle of the Si9166 can reach 100 % in
buck mode. The duty cycle will continue to increase as the
input voltage decreases until it reaches 100 %. This allows
the system designers to extract the maximum stored energy
from the battery. Once the controller delivers 100 % duty
cycle, the converter operates like a saturated linear regula-
tor. At 100 % duty cycle, synchronous rectification is com-
pletely turned off. Up to 80 % maximum duty cycle at 2 MHz
switching frequency, the controller maintains perfect output
voltage regulation. If the input voltage drops below the level
where the converter requires greater than 80 % duty cycle,
the controller will deliver 100 % duty cycle. This instanta-
neous jump in duty cycle is due to fixed BBM time, MOSFET
delay/rise/fall time, and the internal propagational delays. In
order to maintain regulation, controller might fluctuate its
duty cycle back and forth from 100 % to something lower
than 80 % while the converter is operating in this input volt-
age range. If the input voltage drops further, controller will
remain on 100 %. If the input voltage increases to a point
where it’s requiring less than 80 % duty cycle, synchronous
rectification is once again activated.
Document Number: 70847
S-40701-Rev. C, 19-Apr-04
The gate charge losses produced from the Miller capaci-
tance of MOSFETs are the dominant power dissipation
parameter during light load (i.e. < 10 mA). Therefore, less
gate switching will improve overall converter efficiency. This
is exactly why the Si9166 is designed with pulse skipping
mode. If the PWM/PSM pin is connected to logic low level,
converter operates in pulse skipping modulation (PSM)
mode. During the pulse skipping mode, quiescent current of
the controller is decreased to approximately 200 μA, instead
of 500 μA during the PWM mode. This is accomplished by
turning off most of internal control circuitry and utilizing a sim-
ple constant on-time control with feedback comparator. The
controller is designed to have a constant on-time and a min-
imum off-time acting as the feedback comparator blanking
time. If the output voltage drops below the desired level, the
main switch is first turned on and then off. If the applied on-
time is insufficient to provide the desired voltage, the control-
ler will force another on and off sequence, until the desired
voltage is accomplished. If the applied on-time forces the
output to exceed the desired level, as typically found in the
light load condition, the converter stays off. The excess
energy is delivered to the output slowly, forcing the converter
to skip pulses as needed to maintain regulation. The on-time
and off-time are set internally based on inductor used (1.5 μH
typical), MODE pin selection and maximum load current.
Therefore, with this control method, duty cycle ranging from
0 to near 100 % is possible depending on whether buck or
boost is chosen. In pulse skipping mode, synchronous recti-
fier drive is also disabled to further decrease the gate charge
loss and increase overall converter efficiency.
Reference
The reference voltage for the Si9166 is set at 1.3 V. The ref-
erence voltage is internally connected to the non-inverting
inputs of the error amplifier. The reference pin requires
0.1 μF decoupling capacitor.
www.vishay.com
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