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参数资料
| 型号： | SI91842DT-50-T1-E3 |
| 厂商： | VISHAY SILICONIX |
| 元件分类： | 固定正电压单路输出LDO稳压器 |
| 英文描述： | 5 V FIXED POSITIVE LDO REGULATOR, 0.22 V DROPOUT, PDSO5 |
| 封装： | LEAD FREE, TSOT-23, 5 PIN |
| 文件页数： | 3/10页 |
| 文件大小： | 119K |
| 代理商： | SI91842DT-50-T1-E3 |
Si91842
Vishay Siliconix
www.vishay.com
2
Document Number: 71732
S-50956—Rev. F, 16-May-05
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings
Input Voltage, VIN to GND
6.0 to 6.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VERROR, VSD (See Detailed Description)
0.3 V to VIN
. . . . . . . . . . . . . . . . . . . . . . .
Output Current, IOUT
Short Circuit Protected
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Voltage, VOUT
0.3 V to VIN + 0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package Power Dissipation, (Pd)b
440 mW
. . . . . . . . . . . . . . . . . . . . . . . . . . .
Package Thermal Resistance, (qJA)a
180_C/W
. . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature, TJ(max)
150_C
. . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature, TSTG
65_C to 150_C
. . . . . . . . . . . . . . . . . . . . . . . . . .
Notes
a.
Device mounted with all leads soldered or welded to PC board.
b.
Derate 5.5 mW/_C above TA = 70_C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Input Voltage, VIN
2 V to 6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Voltage, VSD
0 V to VIN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Ambient Temperature, TA
40_C to 85_C
. . . . . . . . . . . . . . . . . . . .
CIN = COUT = 1 mF (ceramic)
Maximum ESR of COUT: 0.4 W
SPECIFICATIONS
Test Conditions Unless Specified
TA = 25_C, VIN = VOUT(nom) + 1 V, IOUT = 1 mA,
Limits
40 to 85_C
Parameter
Symbol
TA = 25_C, VIN = VOUT(nom) + 1 V, IOUT = 1 mA,
CIN = 1 mF, COUT = 1.0 mF, VSD = 1.5 V
Tempa Minb
Typc
Maxb
Unit
Input Voltage Range
VIN
Full
2
6
V
VOUT w 18 V
Room
1.5
1
1.5
Output Voltage Accuracy
1 mA v IOUT v 150 mA
VOUT w 1.8 V
Full
2.5
1
2.5
%
Output Voltage Accuracy
1 mA v IOUT v 150 mA
VOUT = 1 2 V
Room
2.0
1
2.0
%
VOUT = 1.2 V
Full
3.0
1
3.0
Line Regulation (VOUT v 3 V)
Full
0.06
0.18
Line Regulation
(3.0 V < VOUT v3.6 V)
DVOUT 100
DVIN VOUT(nom)
From VIN = VOUT(nom) + 1 V to VOUT(nom) + 2 V
Full
0
0.3
%/V
Line Regulation (5-V Version)
IN
OUT(nom)
From VIN = 5.5 V to 6 V
Full
0
0.4
IOUT = 1 mA
Room
1
Dt V lt
dg
IOUT = 50 mA
Room
45
80
Dropout Voltaged, g
(VOUT(nom) w 2.6 V)
IOUT = 50 mA
Full
50
90
(VOUT(nom) w 2.6 V)
IOUT = 150 mA
Room
130
180
VIN VOUT
IOUT = 150 mA
Full
220
mV
VIN VOUT
IOUT = 50 mA
Room
65
100
mV
Dropout Voltaged, g
IOUT = 50 mA
Full
120
Dropout Voltaged, g
(VOUT(nom) t 2.6 V, VIN w 2 V)
IOUT = 150 mA
Room
190
250
()
IOUT = 150 mA
Full
300
IOUT = 0 mA
Room
100
150
Ground Pin Currente, g
IOUT = 0 mA
Full
180
Ground Pin Currente, g
(VOUT(nom) v 3 V)
IOUT = 150 mA
Room
110
200
()
IGND
IOUT = 150 mA
Full
230
mA
IGND
IOUT = 0 mA
Room
110
170
mA
Ground Pin Currente, g
IOUT = 0 mA
Full
200
Ground Pin Currente, g
(VOUT(nom) u 3 V)
IOUT = 150 mA
Room
120
200
()
IOUT = 150 mA
Full
230
Peak Output current
IO(peak)
VOUT w 0.95 x VOUT(nom). tPW = 2 ms
Full
300
mA
Output Noise Voltage
eN
VOUT = 2.6 V, BW = 10 Hz to 100 kHz,
0 mA t IOUT t 150 mA
Room
75
mV(rms)
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