参数资料
| 型号： | SI9200EY |
| 厂商： | Vishay Siliconix |
| 文件页数： | 2/6页 |
| 文件大小： | 0K |
| 描述： | IC PROCESSOR NTWRK SOC 8SOIC |
| 标准包装： | 500 |
| 类型： | CAN 总线驱动器/接收器 |
| 驱动器/接收器数： | 1/1 |
| 规程： | CAN |
| 电源电压： | 4.75 V ~ 5.25 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 散装 |
www.vishay.com
2
Document Number: 70015
S11-0975-Rev. D, 16-May-11
Vishay Siliconix
Si9200
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Notes:
a. Extended exposure to the absolute maximum ratings or stresses beyond these ratings may affect device reliability or may cause permanent
damage to the device. Functional operation at conditions other than the recommended operating conditions is not implied.
b. Mounted on 1-IN2, FR4 PC Board.
ABSOLUTE MAXIMUM RATINGSa
Parameter
Limit
Unit
Operating Temperature (TA)
- 40 to 125
°C
Junction and Storage Temperature
- 55 to 150
Voltage On Any Pin (except CAN_H and CAN_L) with Respect to Ground
- 0.3 to VDD + 0.3
V
Voltage On CAN_H and CAN_L with Respect to Ground
- 3 to 16
Supply Voltage, VDD
- 0.3 to 12
Continuous Output Current
± 100
mA
Thermal Ratingsb: RthJA
62.5 (no airflow)
°C
RECOMMENDED OPERATING RANGE
Parameter
Limit
Unit
VDD
4.75 to 5.25
V
Bus Load Resistance
60
SPECIFICATIONS
Parameter
Symbol
Test Conditions Unless Otherwise Specified
VDD = 4.75 V to 5.25 V
Limits
TA = - 40 V to 125 °C
Unit
Min.b
Typ.c
Max.b
Input
TX Input Voltage High
VINH
4
V
TX Input Voltage Low
VINL
1
TX Input Current Low
IIL
TX = 0 V
- 50
- 2
A
TX Input Current High
IIH
TX = VDD
- 1
1
Output
Bus Recessive
VCAN_HR, VCAN_LR
TX = VINH, RL =
22.5
3
V
VDIF =
VCAN_HR - VCAN_LR
- 0.5
0
0.05
Bus Dominant
VCAN_HD
TX = VINL, RL = 60
2.75
3.5
4.5
VCAN_LD
0.5
1.5
2.25
VDIF =
VCAN_HD - VCAN_LD
1.5
2
3
Reference Output
VREF
- 25 A
I
REF 25 A
0.5 VDD - 0.2
0.5 VDD
0.5 VDD + 0.2
Receive Output
(Bus Recessive
Conditions)
VRXH
TX = VINH
- 2
V
CAN_H, VCAN_L 7
- 1
V
CAN_H - VCAN_L
0.5 (Bus Recessive)
IOUT = - 10 A
VDD - 0.3
VDD - 0.05
IOUT = - 100 A
VDD - 1
VDD - 0.2
IOUT = - 2 mA
VDD - 1.75
VDD - 1
Receive Output
(Bus Dominant
Conditions)
VRXL
TX = VINH
- 0.8
V
CAN_H 7
- 2
V
CAN_L 5.8
0.9
V
CAN_H - VCAN_L 5
( Bus Dominant)
IOUT = 10 A
0.05
0.3
IOUT = 100 A
0.2
1
IOUT = 2 mA
11.75
Internal Resistance
from Bus Pins
RIN, BUS_L
TX = VINH (Recessive)
550
k
RIN, BUS_H
550
RDIFF
10
100
Internal Capacitance
from Bus Pinsc
CIN
(CAN_H,
CAN_L)
50
pF
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