参数资料
型号: SIP12107DMP-T1-GE3
厂商: Vishay Siliconix
文件页数: 15/19页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ QFN33-16L
标准包装: 1
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 可调至 0.6V
输入电压: 2.8 V ~ 5.5 V
PWM 型: 电流模式
频率 - 开关: 200kHz ~ 4MHz
电流 - 输出: 3A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: *
包装: 标准包装
供应商设备封装: 16-QFN(3x3)
其它名称: SIP12107DMP-T1-GE3DKR
SiP12107
www.vishay.com
INDUCTOR SELECTION
In order to determine the inductance, the ripple current must
first be defined. Cost, PCB size, output ripple, and efficiency
are all used in the selection process. Low inductor values
result in smaller size and allow faster transient performance
Vishay Siliconix
Assuming a peak voltage V PEAK of 1.3 V (100 mV rise upon
load release), and a 3 A load release, the required
capacitance is shown by the next equation.
but create higher ripple current which can reduce efficiency.
Higher inductor values will reduce the ripple current while
compromising the efficiency (higher DCR) and transient
response.
C OUTmin. =
1 μH x (3 A + 0.5 x (81 A)) 2
(1.3 V) 2 - (1.2 V) 2
= 46.37 μF
The ripple current will also set the boundary for power-save
operation. The switcher will typically enter power-save
mode when the load current decreases to 1/2 of the ripple
current. For example, if ripple current is 1 A then power-save
operation will typically start at loads approaching 0.5 A.
Alternatively, if ripple current is set at 40 % of maximum load
current, then power-save will start for loads less than
~ 20 % of maximum current.
Setting the ripple current 20 % to 50 % of the maximum load
current provides an optimal trade-off of the areas mentioned
above.
The equation for determining inductance is shown next.
Example
If the load release is relatively slow, the output capacitance
can be reduced. Using MLCC ceramic capacitors we will
use 3 x 22 μF or 66 μF as the total output capacitance.
STABILITY CONSIDERATIONS
Using the output capacitance as a starting point for
compensation values. Then, taking Bode plots and transient
response measurements we can fine tune the compensation
values.
Setting the crossover frequency to 1/5 of the switching
frequency:
F 0 = F sw /5 = 1 MHz/5 = 200 kHz
Setting the compensation zero at 1/5 to 1/10 the crossover
frequency for the phase boost:
In this example, the inductor ripple current is set equal to
30 % of the maximum load current. Thus ripple current will
be 30 % x 3 A or 0.9 A. To find the minimum inductance
F Z =
1
2π x R C x C C
=
F 0
5
needed, use the V IN and T ON values that correspond to
V INmax.
Setting C C = 1 nF and solve for R C
L = ? V IN - V OUT ? x ----------
T ON
? i
R C =
5
2π x C C x F 0
=
5
2π x 1 nF x 200K
= 4K
Plugging numbers into the above equation we get
s
330 x 10
? i = ? 3.63 V - 1.2 V ? x ------------------ = 0.8 A
L x ? ? I OUT + --- x I RIPPLEmax. ? ?
-9
L = ? 3.63 V - 1.2 V ? x -------------------------------- = 0.891 μH
0.9 A
A slightly larger value of 1 μH is selected which is a standard
value. This will decrease the maximum ripple current by
10 %. Note that the inductor must be rated for the maximum
DC load current plus 1/2 of the ripple current. The actual
ripple current using the chosen 1 μH inductor comes out to
be.
330 ns
1 μH
Output Capacitance Calculation
The output capacitance is usually chosen to meet transient
requirements. A worst-case load release, from maximum
load to no load at the exact moment when inductor current
is at the peak, determines the required capacitance. If the
load release is instantaneous (load changes from maximum
to zero in < 1/F SW μs), the output capacitor must absorb all
the inductor’s stored energy. This will approximately cause
a peak voltage on the capacitor according to the following
equation.
1 2
2
2 2
C OUTmin. = -------------------------------------------------------------------------
? V peak ? - ? V OUT ?
SWITCHING FREQUENCY VARIATIONS
The switching frequency variation in COT can be mainly
attributed to the increase in conduction losses as the load
increases. The on time is “ideally constant” so the controller
must account for losses by reducing the off time which
increases the overall duty cycle. Hence the F SW will tend to
increase with load.
In power save mode (PSM) the IC will run in pulse skip mode
at light loads. As the load increases the F SW will increase
until it reaches the nominal set F SW . This transition occurs
approximately when the load reaches to 20 % of the full load
current.
S12-0412-Rev. B, 20-Feb-12
15
Document Number: 63395
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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